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NXP K32L2B11VLH0A

celestial-altium-ARM_Cortex

Symbol

64 pins
Schematic symbol for NXP K32L2B11VLH0A
Units
2
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
1LCD_P48/PTE0/CLKOUT32K/SPI1_MISO/LPUART1_TX/RTC_CLKOUT/CMP0_OUT/I2C1_SDApassive
2LCD_P49/PTE1/SPI1_MOSI/LPUART1_RX/SPI1_MISO/I2C1_SCLpassive
3VDD17passive
4VSS18passive
5USB0_DPpassive
6USB0_DMpassive
7VOUT33passive
8VREGINpassive
9LCD_P59/ADC0_DP0/ADC0_SE0/PTE20/TPM1_CH0/LPUART0_TX/FXIO0_D4passive
10LCD_P60/ADC0_DM0/ADC0_SE4a/PTE21/TPM1_CH1/LPUART0_RX/FXIO0_D5passive
11ADC0_DP3/ADC0_SE3/PTE22/TPM2_CH0/UART2_TX/FXIO0_D6passive
12ADC0_DM3/ADC0_SE7a/PTE23/TPM2_CH1/UART2_RX/FXIO0_D7passive
13VDDApassive
14VREFHpassive
15VREFLpassive
16VSSApassive
17CMP0_IN5/ADC0_SE4b/PTE29/TPM0_CH2/TPM_CLKIN0passive
18DAC0_OUT/ADC0_SE23/CMP0_IN4/PTE30/TPM0_CH3/TPM_CLKIN1/LPUART1_TX/LPTMR0_ALT1passive
19PTE31/TPM0_CH4passive
20PTE24/TPM0_CH0/I2C0_SCLpassive
21PTE25/TPM0_CH1/I2C0_SDApassive
22PTA0/TPM0_CH5/SWD_CLKpassive
23PTA1/LPUART0_RX/TPM2_CH0passive
24PTA2/LPUART0_TX/TPM2_CH1passive
25PTA3/I2C1_SCL/TPM0_CH0/SWD_DIOpassive
26~{PTA4}/I2C1_SDA/TPM0_CH1/~{NMI_b}passive
27PTA5/USB_CLKIN/TPM0_CH2passive
28PTA12/TPM1_CH0passive
29PTA13/TPM1_CH1passive
30VDD94passive
31VSS95passive
32EXTAL0/PTA18/LPUART1_RX/TPM_CLKIN0passive
33XTAL0/PTA19/LPUART1_TX/TPM_CLKIN1/LPTMR0_ALT1passive
34~{PTA20}/~{RESET_b}passive
35LCD_P0/ADC0_SE8/PTB0/LLWU_P5/I2C0_SCL/TPM1_CH0passive
36LCD_P1/ADC0_SE9/PTB1/I2C0_SDA/TPM1_CH1passive
37LCD_P2/ADC0_SE12/PTB2/I2C0_SCL/TPM2_CH0passive
38LCD_P3/ADC0_SE13/PTB3/I2C0_SDA/TPM2_CH1passive
39LCD_P12/PTB16/SPI1_MOSI/LPUART0_RX/TPM_CLKIN0/SPI1_MISOpassive
40LCD_P13/PTB17/SPI1_MISO/LPUART0_TX/TPM_CLKIN1/SPI1_MOSIpassive
41LCD_P14/PTB18/TPM2_CH0passive
42LCD_P15/PTB19/TPM2_CH1passive
43LCD_P20/ADC0_SE14/PTC0/EXTRG_IN/USB_SOF_OUT/CMP0_OUTpassive
44LCD_P21/ADC0_SE15/PTC1/LLWU_P6/RTC_CLKIN/I2C1_SCL/TPM0_CH0passive
45LCD_P22/ADC0_SE11/PTC2/I2C1_SDA/TPM0_CH1passive
46LCD_P23/PTC3/LLWU_P7/SPI1_SCK/LPUART1_RX/TPM0_CH2/CLKOUTpassive
47VSS136passive
48VLL3passive
49VLL2/LCD_P4/PTC20passive
50VLL1/LCD_P5/PTC21passive
51VCAP2/LCD_P6/PTC22passive
52VCAP1/LCD_P39/PTC23passive
53LCD_P24/PTC4/LLWU_P8/SPI0_SS/LPUART1_TX/TPM0_CH3passive
54LCD_P25/PTC5/LLWU_P9/SPI0_SCK/LPTMR0_ALT2/CMP0_OUTpassive
55LCD_P26/CMP0_IN0/PTC6/LLWU_P10/SPI0_MOSI/EXTRG_IN/SPI0_MISOpassive
56LCD_P27/CMP0_IN1/PTC7/SPI0_MISO/USB_SOF_OUT/SPI0_MOSIpassive
57LCD_P40/PTD0/SPI0_SS/TPM0_CH0/FXIO0_D0passive
58LCD_P41/ADC0_SE5b/PTD1/SPI0_SCK/TPM0_CH1/FXIO0_D1passive
59LCD_P42/PTD2/SPI0_MOSI/UART2_RX/TPM0_CH2/SPI0_MISO/FXIO0_D2passive
60LCD_P43/PTD3/SPI0_MISO/UART2_TX/TPM0_CH3/SPI0_MOSI/FXIO0_D3passive
61LCD_P44/PTD4/LLWU_P14/SPI1_SS/UART2_RX/TPM0_CH4/FXIO0_D4passive
62LCD_P45/ADC0_SE6b/PTD5/SPI1_SCK/UART2_TX/TPM0_CH5/FXIO0_D5passive
63LCD_P46/ADC0_SE7b/PTD6/LLWU_P15/SPI1_MOSI/LPUART0_RX/SPI1_MISO/FXIO0_D6passive
64LCD_P47/PTD7/SPI1_MISO/LPUART0_TX/SPI1_MOSI/FXIO0_D7passive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed