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NXP K32L2B31VFT0A

celestial-altium-ARM_Cortex

Symbol

48 pins
Schematic symbol for NXP K32L2B31VFT0A
Units
2
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
1VDD17passive
2VSS18passive
3USB0_DPpassive
4USB0_DMpassive
5VOUT33passive
6VREGINpassive
7ADC0_DP0/ADC0_SE0/PTE20/TPM1_CH0/LPUART0_TX/FXIO0_D4passive
8ADC0_DM0/ADC0_SE4a/PTE21/TPM1_CH1/LPUART0_RX/FXIO0_D5passive
9VDDApassive
10VREFHpassive
11VREFLpassive
12VSSApassive
13CMP0_IN5/ADC0_SE4b/PTE29/TPM0_CH2/TPM_CLKIN0passive
14DAC0_OUT/ADC0_SE23/CMP0_IN4/PTE30/TPM0_CH3/TPM_CLKIN1/LPUART1_TX/LPTMR0_ALT1passive
15PTE24/TPM0_CH0/I2C0_SCLpassive
16PTE25/TPM0_CH1/I2C0_SDApassive
17PTA0/TPM0_CH5/SWD_CLKpassive
18PTA1/LPUART0_RX/TPM2_CH0passive
19PTA2/LPUART0_TX/TPM2_CH1passive
20PTA3/I2C1_SCL/TPM0_CH0/SWD_DIOpassive
21~{PTA4}/I2C1_SDA/TPM0_CH1/~{NMI_b}passive
22VDD94passive
23VSS95passive
24EXTAL0/PTA18/LPUART1_RX/TPM_CLKIN0passive
25XTAL0/PTA19/LPUART1_TX/TPM_CLKIN1/LPTMR0_ALT1passive
26~{PTA20}/~{RESET_b}passive
27ADC0_SE8/PTB0/LLWU_P5/I2C0_SCL/TPM1_CH0passive
28ADC0_SE9/PTB1/I2C0_SDA/TPM1_CH1passive
29ADC0_SE12/PTB2/I2C0_SCL/TPM2_CH0passive
30ADC0_SE13/PTB3/I2C0_SDA/TPM2_CH1passive
31PTB16/SPI1_MOSI/LPUART0_RX/TPM_CLKIN0/SPI1_MISOpassive
32PTB17/SPI1_MISO/LPUART0_TX/TPM_CLKIN1/SPI1_MOSIpassive
33ADC0_SE14/PTC0/EXTRG_IN/USB_SOF_OUT/CMP0_OUTpassive
34ADC0_SE15/PTC1/LLWU_P6/RTC_CLKIN/I2C1_SCL/TPM0_CH0passive
35ADC0_SE11/PTC2/I2C1_SDA/TPM0_CH1passive
36PTC3/LLWU_P7/SPI1_SCK/LPUART1_RX/TPM0_CH2/CLKOUTpassive
37PTC4/LLWU_P8/SPI0_SS/LPUART1_TX/TPM0_CH3passive
38PTC5/LLWU_P9/SPI0_SCK/LPTMR0_ALT2/CMP0_OUTpassive
39CMP0_IN0/PTC6/LLWU_P10/SPI0_MOSI/EXTRG_IN/SPI0_MISOpassive
40CMP0_IN1/PTC7/SPI0_MISO/USB_SOF_OUT/SPI0_MOSIpassive
41PTD0/SPI0_SS/TPM0_CH0/FXIO0_D0passive
42ADC0_SE5b/PTD1/SPI0_SCK/TPM0_CH1/FXIO0_D1passive
43PTD2/SPI0_MOSI/UART2_RX/TPM0_CH2/SPI0_MISO/FXIO0_D2passive
44PTD3/SPI0_MISO/UART2_TX/TPM0_CH3/SPI0_MOSI/FXIO0_D3passive
45PTD4/LLWU_P14/SPI1_SS/UART2_RX/TPM0_CH4/FXIO0_D4passive
46ADC0_SE6b/PTD5/SPI1_SCK/UART2_TX/TPM0_CH5/FXIO0_D5passive
47ADC0_SE7b/PTD6/LLWU_P15/SPI1_MOSI/LPUART0_RX/SPI1_MISO/FXIO0_D6passive
48PTD7/SPI1_MISO/LPUART0_TX/SPI1_MOSI/FXIO0_D7passive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed