NXP K32L3A60VPJ1A

celestial-altium-ARM_Cortex

Symbol

169 pins
Schematic symbol for NXP K32L3A60VPJ1A
Units
6
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
A1PTA30_0/LLWU_P3_0/LPUART2_CTS_0/LPSPI1_SOUT_0/FB_AD14_0/TPM1_CH0_0/LPTMR2_ALT2_0passive
A2PTA28/LPUART1_RTS/LPSPI3_PCS0/FB_AD28passive
A3PTA27/LPUART1_CTS/LPSPI3_SIN/FB_AD29passive
A5PTA26/LPUART1_TX/LPSPI3_PCS2/LPI2C2_SCLS/FB_AD30passive
A7PTA15/LPI2C2_SCL/FB_AD22passive
A9PTA10/LPI2C2_SCLS/LPSPI3_SOUT/FB_A22passive
B1PTB2/LLWU_P5/LPSPI0_PCS1/LPUART1_RX/I2S0_TX_D0/FB_AD11/TPM0_CH0passive
B2PTA30_1/LLWU_P3_1/LPUART2_CTS_1/LPSPI1_SOUT_1/FB_AD14_1/TPM1_CH0_1/LPTMR2_ALT2_1passive
B3PTB0/LPUART2_TX/LPSPI1_SIN/USB0_SOF_OUT/CLKOUT/TPM1_CLKINpassive
B5PTA25/LPUART1_RX/LPSPI3_SOUT/LPI2C2_SDAS/FB_AD31passive
B6PTA22/LLWU_P2/LPSPI2_PCS2/LPI2C2_HREQ/FB_AD16/TPM2_CH2passive
B7PTA21/LPSPI2_SOUT/EMVSIM0_PD/FB_AD17/TPM2_CH3passive
B9PTA4/LPUART0_RTS/LPI2C0_SCLS/LPUART1_RTS/LPCMP0_OUT/JTAG_TMS/SWD_DIOpassive
C1LPADC0_SE0/PTB3/LPSPI0_PCS3/LPUART1_TX/I2S0_TX_FS/FB_AD10/TPM0_CH1passive
C2~{LPADC0_SE1}/PTB4/LLWU_P6/LPSPI0_SCK/LPUART1_CTS/~{I2S0_TX_BCLK}/FB_AD9/TPM0_CH2passive
C3PTB1/LLWU_P4/LPUART2_RX/LPSPI1_PCS0/I2S0_TX_D1/FB_AD12/LPTMR1_ALT3passive
C4PTA31/LPUART2_RTS/LPSPI1_PCS2/FB_AD13/TPM1_CH1passive
C5VSS165passive
C7PTA20/LPSPI2_SCK/LPSPI1_PCS1/EMVSIM0_IO/FB_AD18/TPM2_CH4passive
C9VDDIO19passive
D2PTB5/LPSPI0_SOUT/LPUART1_RTS/I2S0_MCLK/FB_AD8/TPM0_CH3passive
D5VSS8passive
D6~{PTA24}/LPSPI2_PCS0/LPSPI1_SCK/LPI2C2_SCL/~{FB_OE_b}/TPM2_CH0passive
D7PTA19/LPSPI2_PCS3/LPSPI3_SCK/EMVSIM0_VCCEN/FB_AD19/TPM2_CH5passive
D8PTA18/LPSPI2_PCS1/LPSPI3_PCS3/EMVSIM0_RST/FB_AD20passive
D9VSS169passive
E1~{PTB6}/LLWU_P7/LPSPI0_PCS2/LPI2C1_SDA/~{I2S0_RX_BCLK}/FB_AD7/TPM0_CH4passive
E2LPADC0_SE2/PTB7/LLWU_P8/LPSPI0_SIN/LPI2C1_SDAS/I2S0_RX_FS/FB_AD6/TPM0_CH5passive
E3VDDIO1155passive
E4VDDIO1141passive
E6PTA23/LPSPI2_SIN/LPSPI1_PCS3/LPI2C2_SDA/FB_AD15/TPM2_CH1passive
E8PTA14/LPI2C2_SDA/FB_AD23/LPCMP0_OUTpassive
F4~{LPADC0_SE3}/PTB9/SPM_LPREQ/LPSPI0_PCS1/LPI2C1_SCL/I2S0_RX_D1/~{FB_RW_b}/FXIO0_D0passive
F5PTB8/LLWU_P9/LPSPI0_PCS0/LPI2C1_SCLS/I2S0_RX_D0/FB_AD5/LPTMR0_ALT1passive
F7PTA17/LPI2C2_HREQ/LPSPI3_PCS1/EMVSIM0_CLK/FB_AD21passive
G1~{PTB15}/LPI2C1_HREQ/LPI2C3_SCL/~{FB_CS5_b}/FB_TSIZ1/~{FB_BE23_16_b}/TPM0_CLKIN/FXIO0_D5passive
G2PTB14/LPUART2_RTS/LPI2C1_SCL/LPI2C0_SCLS/FB_AD24/TPM3_CH1/FXIO0_D4passive
G3PTB13/LPUART2_CTS/LPI2C1_SDA/LPI2C0_SDAS/FB_AD25/TPM3_CH0/FXIO0_D3passive
G4PTB12/LPUART2_TX/LPI2C1_SCLS/LPI2C0_SCL/FB_AD26/TPM3_CLKIN/FXIO0_D2passive
G6PTB11/LPUART2_RX/LPI2C1_SDAS/LPI2C0_SDA/FB_AD27/FXIO0_D1passive
H2~{PTB18}/LPSPI1_PCS1/LPUART2_RX/LPI2C3_SDAS/~{FB_CS3_b}/~{FB_BE7_0_b}/~{FB_TA_b}/FXIO0_D8passive
H5~{PTB16}/LLWU_P10/LPUART3_CTS/LPI2C3_SDA/~{FB_CS4_b}/FB_TSIZ0/~{FB_BE31_24_b}/FXIO0_D6passive
H8VSS172passive
H9VDD_CORE133passive
J1~{PTB20}/LLWU_P11/LPSPI1_SCK/LPUART2_CTS/~{FB_CS0_b}/TPM1_CH0/FXIO0_D10passive
J2PTB21/LPSPI1_SOUT/LPUART2_RTS/LPI2C2_HREQ/FB_AD4/TPM1_CH1/FXIO0_D11passive
J3VDDIO123passive
J4VSS22passive
J8VDD_CORE88passive
K4~{PTB19}/LPSPI1_PCS3/LPUART2_TX/FB_ALE/~{FB_CS1_b}/~{FB_TS_b}/TPM1_CLKIN/FXIO0_D9passive
K5~{PTB17}/LPUART3_RTS/LPI2C3_SCLS/~{FB_TBST_b}/~{FB_CS2_b}/~{FB_BE15_8_b}/FXIO0_D7passive
K8VSS174passive
K9VDDIO1135passive
L1PTB22/LLWU_P12/LPSPI1_PCS2/LPUART0_CTS/LPI2C2_SDA/FB_AD3/TPM2_CLKIN/FXIO0_D12passive
L2PTB24/LPSPI1_SIN/LPUART0_RTS/LPI2C2_SCL/FB_AD2/EWM_IN/FXIO0_D13passive
L3PTB29/LPUART3_TX/I2S0_TX_FS/FB_A17/FXIO0_D16passive
L4PTB26/USB0_SOF_OUT/LPUART0_TX/LPI2C2_SCLS/FB_AD0/LPCMP0_OUTpassive
L6~{PTB25}/LLWU_P13/LPSPI1_PCS0/LPUART0_RX/LPI2C2_SDAS/FB_AD1/~{EWM_OUT_b}/FXIO0_D14passive
M2~{PTC1}/~{I2S0_RX_BCLK}/FB_A21passive
M4PTB28/LLWU_P14/LPUART3_RX/I2S0_TX_D0/FB_A16/FXIO0_D15passive
M5~{PTB30}/~{I2S0_TX_BCLK}/FB_A18passive
M7PTB31/I2S0_RX_D0/FB_A19passive
N1PTC0/I2S0_RX_FS/FB_A20passive
N2LPCMP0_IN0/PTC7/LLWU_P15/LPSPI0_PCS3/LPUART0_RX/LPI2C1_HREQ/TPM0_CH0/LPTMR1_ALT1passive
N3VSS33passive
N4USB0_VSSpassive
N6PTC29/LPUART1_RX/LPSPI0_PCS3/TPM0_CH2/FXIO0_D18passive
N8PTD4/SDHC0_D5/LPSPI2_PCS1/EMVSIM0_RST/FXIO0_D24passive
P3LPCMP0_IN1/PTC8/LPSPI0_SCK/LPUART0_TX/LPI2C0_HREQ/TPM0_CH1passive
P5VDDIO169passive
P6PTC27/TPM0_CH4passive
P7PTD1/LPUART1_RTS/LPSPI0_PCS2/EWM_IN/FXIO0_D21passive
P9VSS48passive
R1LPADC0_SE4/LPCMP0_IN2/PTC9/LLWU_P16/LPSPI0_SOUT/LPUART0_CTS/LPI2C0_SDA/TPM0_CH2/LPTMR0_ALT2passive
R2LPADC0_SE5/PTC10/LPSPI0_PCS2/LPUART0_RTS/LPI2C0_SCL/TPM0_CH3passive
R3~{LPADC0_SE7}/PTC12/LLWU_P18/LPSPI0_PCS0/LPI2C1_SCL/LPI2C0_SCLS/TPM0_CH5/~{EWM_OUT_b}passive
R5VDDIO155passive
R7PTC30/LPUART1_TX/LPSPI0_SCK/TPM0_CH1/FXIO0_D19passive
R9VDDIO147passive
T1LPADC0_SE6/PTC11/LLWU_P17/LPSPI0_SIN/LPI2C1_SDA/LPI2C0_SDAS/TPM0_CH4/EWM_INpassive
T2VDD_DCDC191passive
T3VOUT_AUXpassive
T4LNpassive
T5VOUT_COREpassive
T7PTD0/LPUART1_CTS/LPSPI0_SOUT/TPM0_CH0/FXIO0_D20passive
T8PTD3/SDHC0_D6/LPSPI0_PCS0/EMVSIM0_CLK/TPM2_CLKIN/FXIO0_D23passive
T9LPADC0_SE11/PTD8/LLWU_P19/SDHC0_DCLK/LPSPI2_PCS2/LPI2C1_SDAS/TRACE_D1/TPM2_CH3/FXIO0_D28passive
U1VDD_DCDC41passive
U2LPpassive
U3GNDpassive
U5PTC28/LPSPI0_PCS1/TPM0_CH3/FXIO0_D17passive
U7~{PTD2}/SDHC0_D7/LPSPI0_SIN/~{EWM_OUT_b}/FXIO0_D22passive
U9LPADC0_SE9/PTD6/SDHC0_D1/LPSPI2_SCK/EMVSIM0_IO/TRACE_D3/TPM2_CH5/FXIO0_D26passive
A13VSS154passive
A16VSS121passive
A17VSS140passive
B10~{PTA0}/~{NMI_b}passive
B14VSS162passive
B15VSS163passive
B16VSS164passive
C13VSS166passive
C15VSS167passive
C16VSS168passive
D11PTA3/LPUART0_TX/LPI2C0_SCL/LPUART1_TX/TPM0_CLKIN/JTAG_TDO/SWD_SWOpassive
D12~{RESET_b}passive
D13VDDIO290passive
D15VSS170passive
E10PTA9/LPI2C2_SDAS/LPSPI3_SCK/FB_A23passive
E12PTA1/LLWU_P0/LPUART0_CTS/LPI2C0_SDAS/LPUART1_CTS/JTAG_TCLK/SWD_CLKpassive
E14VSS134passive
E15VSS118passive
E16EXTAL32passive
E17XTAL32passive
F11PTA2/LLWU_P1/LPUART0_RX/LPI2C0_SDA/LPUART1_RX/JTAG_TDIpassive
F13TAMPER1/RTC_CLKOUTpassive
F14~{TAMPER0}/~{RTC_WAKEUP_b}passive
F16VSS171passive
G12TAMPER2/RTC_CLKOUTpassive
G14PTE28/LPUART3_RTS/LPI2C3_SCLS/FXIO0_D29passive
G15PTE29/LPUART3_RX/LPI2C3_SDA/FXIO0_D30passive
G16VBATpassive
G17PTE30/LPUART3_TX/LPI2C3_SCL/TPM2_CLKIN/FXIO0_D31passive
H10VSS173passive
H13TAMPER3/RTC_CLKOUTpassive
H14PTE27/LPUART3_CTS/LPI2C3_SDAS/FXIO0_D28passive
J10VDDIO134passive
J14VSS105passive
J15VDDIO2106passive
J16PTE22/I2S0_RX_D1/LPI2C3_HREQ/TPM2_CH5/FXIO0_D11passive
J17PTE21/I2S0_TX_D1/USB0_SOF_OUT/TPM2_CH4/FXIO0_D10passive
K10VSS89passive
K13PTE18/I2S0_RX_D0/TPM2_CH2/FXIO0_D8passive
K16PTE19/I2S0_MCLK/TPM2_CH3/FXIO0_D9passive
L12PTE12/LLWU_P26/SDHC0_D2/LPI2C3_SDAS/TPM3_CLKIN/FXIO0_D2passive
L14~{PTE16}/~{I2S0_RX_BCLK}/TPM2_CH0/FXIO0_D6passive
L15PTE17/I2S0_RX_FS/TPM2_CH1/FXIO0_D7passive
L16PTE14/I2S0_TX_FS/LPI2C3_HREQ/TPM3_CH1/FXIO0_D4passive
L17PTE15/I2S0_TX_D0/TPM3_CLKIN/FXIO0_D5passive
M11LPADC0_SE21/LPCMP1_IN1/PTE4/SDHC0_D6/LPI2C0_SCL/LPSPI3_SOUT/CLKOUT/TPM1_CLKINpassive
M13PTE10/LLWU_P25/SDHC0_D4/LPUART3_CTS/LPI2C3_SDA/TPM3_CH0/LPTMR2_ALT3passive
M14PTE11/SDHC0_D3/LPUART3_RTS/LPI2C3_SCL/TPM3_CH1/FXIO0_D1passive
N10LPADC0_SE8/PTD5/SDHC0_D4/LPSPI2_PCS3/EMVSIM0_VCCEN/FXIO0_D25passive
N12LPADC0_SE20/LPCMP1_IN0/PTE3/LLWU_P22/SDHC0_D7/LPI2C0_SDA/LPSPI3_SCK/TPM0_CLKIN/LPTMR0_ALT3passive
N14VDD_CORE190passive
N15VDD_CORE49passive
N16LPADC0_SE23/PTE9/LLWU_P24/SDHC0_CMD/LPUART3_TX/LPSPI3_PCS0/TPM1_CH1/FXIO0_D0passive
N17~{PTE13}/~{I2S0_TX_BCLK}/LPI2C3_SCLS/TPM3_CH0/FXIO0_D3passive
P10LPADC0_SE10/PTD7/SDHC0_D0/LPSPI2_SOUT/EMVSIM0_PD/TRACE_D2/TPM2_CH4/FXIO0_D27passive
P11LPADC0_SE13/PTD10/LLWU_P20/SDHC0_D3/LPSPI2_PCS0/LPI2C1_SDA/TRACE_CLKOUT/TPM2_CH1/FXIO0_D30passive
P12LPADC0_SE19/PTE2/SDHC0_D0/LPI2C0_SCLS/LPSPI3_PCS3/LPCMP1_OUTpassive
P13VSS70passive
P16LPADC0_SE22/PTE8/LLWU_P23/SDHC0_D5/LPUART3_RX/LPSPI3_SIN/TPM1_CH0/LPTMR2_ALT1passive
R11LPADC0_SE14/PTD11/SDHC0_D2/USB0_SOF_OUT/LPI2C1_SCL/CLKOUT/TPM2_CH0/FXIO0_D31passive
R13VSS56passive
R14LPCMP1_IN4/PTE0/EWM_INpassive
R15VSSA192passive
R16~{LPADC0_SE18}/PTE1/LLWU_P21/SDHC0_D1/LPI2C0_SDAS/LPSPI3_PCS1/~{EWM_OUT_b}/LPTMR1_ALT2passive
R17LPCMP1_IN2/PTE5/SDHC0_DCLK/LPI2C0_HREQ/LPSPI3_PCS2/LPCMP1_OUTpassive
T11USB0_DPpassive
T12USB0_DMpassive
T13VOUT33passive
T15VREF_OUT/LPADC0_SE15/LPCMP0_IN5/LPCMP1_IN5passive
T16VSSA80passive
T17DAC0_OUT/LPADC0_SE16/LPCMP0_IN3/LPCMP1_IN3passive
U11LPADC0_SE12/PTD9/SDHC0_CMD/LPSPI2_SIN/LPI2C1_SCLS/TRACE_D0/TPM2_CH2/FXIO0_D29passive
U13VREGINpassive
U15VDDApassive
U16VREFHpassive
U17VREFLpassive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed