NXP LPC51U68JBD64

celestial-altium-ARM_Cortex

Symbol

64 pins

Units: 3
Kind: part
Grid: on 1.27 mm

Footprint

none

no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none

no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

Pin	Name	Type
1	PIO0_23/FC1_RTS_SCL_SSEL1/CTIMER0_CAP0/UTICK_CAP1	passive
2	PIO0_24/FC1_CTS_SDA_SSEL0/CTIMER0_CAP1/CTIMER0_MAT0	passive
3	PIO0_25/FC4_RTS_SCL_SSEL1/FC6_CTS_SDA_SSEL0/CTIMER0_CAP2/CTIMER1_CAP1	passive
4	PIO0_26/FC4_CTS_SDA_SSEL0/CTIMER0_CAP3	passive
5	USB0_DP	passive
6	USB0_DM	passive
7	PIO1_16/CTIMER0_MAT0/CTIMER0_CAP0/FC7_RTS_SCL_SSEL1	passive
8	VDD8	passive
9	VSS9	passive
10	PIO1_17/MCLK/UTICK_CAP3	passive
11	PIO0_29/FC1_RXD_SDA_MOSI/SCT0_OUT2/CTIMER0_MAT3/CTIMER0_CAP1/CTIMER0_MAT1/ADC0_0	passive
12	PIO0_30/FC1_TXD_SCL_MISO/SCT0_OUT3/CTIMER0_MAT2/CTIMER0_CAP2/ADC0_1	passive
13	PIO0_31/FC2_CTS_SDA_SSEL0/CTIMER0_CAP3/CTIMER0_MAT3/ADC0_2	passive
14	PIO1_0/FC2_RTS_SCL_SSEL1/CTIMER3_MAT1/CTIMER0_CAP0/ADC0_3	passive
15	PIO1_1/SCT0_OUT4/FC5_SSEL2/FC4_TXD_SCL_MISO/ADC0_4	passive
16	PIO1_2/MCLK/FC7_SSEL3/SCT0_OUT5/FC5_SSEL3/FC4_RXD_SDA_MOSI/ADC0_5	passive
17	PIO1_3/FC7_SSEL2/SCT0_OUT6/FC3_SCK/CTIMER0_CAP1/USB0_UP_LED/ADC0_6	passive
18	PIO1_4/FC7_RTS_SCL_SSEL1/SCT0_OUT7/FC3_TXD_SCL_MISO/CTIMER0_MAT1/ADC0_7	passive
19	PIO1_5/FC7_CTS_SDA_SSEL0/CTIMER1_CAP0/CTIMER1_MAT3/USB0_FRAME/ADC0_8	passive
20	VSSA	passive
21	VREFN	passive
22	VREFP	passive
23	VDDA	passive
24	VDD24	passive
25	VSS25	passive
26	PIO1_6/FC7_SCK/CTIMER1_CAP2/CTIMER1_MAT2/USB0_VBUS/ADC0_9	passive
27	PIO1_7/FC7_RXD_SDA_MOSI_DATA/CTIMER1_MAT2/CTIMER1_CAP2/ADC0_10	passive
28	PIO1_8/FC7_TXD_SCL_MISO_WS/CTIMER1_MAT3/CTIMER1_CAP3/ADC0_11	passive
29	PIO1_9/FC3_RXD_SDA_MOSI/CTIMER0_CAP2/USB0_UP_LED	passive
30	PIO1_10/FC6_TXD_SCL_MISO_WS/SCT0_OUT4/FC1_SCK/USB0_FRAME	passive
31	PIO0_0/FC0_RXD_SDA_MOSI/FC3_CTS_SDA_SSEL0/CTIMER0_CAP0/SCT0_OUT3	passive
32	PIO0_1/FC0_TXD_SCL_MISO/FC3_RTS_SCL_SSEL1/CTIMER0_CAP1/SCT0_OUT1	passive
33	RTCXIN	passive
34	VDD34	passive
35	RTCXOUT	passive
36	PIO0_2/FC0_CTS_SDA_SSEL0/FC2_SSEL3	passive
37	PIO0_3/FC0_RTS_SCL_SSEL1/FC2_SSEL2/CTIMER1_MAT3	passive
38	PIO0_4/FC0_SCK/FC3_SSEL2/CTIMER0_CAP2	passive
39	PIO0_5/FC6_RXD_SDA_MOSI_DATA/SCT0_OUT6/CTIMER0_MAT0	passive
40	PIO0_6/FC6_TXD_SCL_MISO_WS/CTIMER0_MAT1/UTICK_CAP0	passive
41	PIO0_7/FC6_SCK/SCT0_OUT0/CTIMER0_MAT2/CTIMER0_CAP2	passive
42	PIO1_11/FC6_RTS_SCL_SSEL1/CTIMER1_CAP0/FC4_SCK/USB0_VBUS	passive
43	PIO0_8/FC2_RXD_SDA_MOSI/SCT0_OUT1/CTIMER0_MAT3	passive
44	PIO0_9/FC2_TXD_SCL_MISO/SCT0_OUT2/CTIMER3_CAP0/FC3_CTS_SDA_SSEL0	passive
45	PIO0_10/FC2_SCK/SCT0_OUT3/CTIMER3_MAT0	passive
46	PIO0_11/FC3_SCK/FC6_RXD_SDA_MOSI_DATA	passive
47	PIO0_12/FC3_RXD_SDA_MOSI/FC6_TXD_SCL_MISO_WS	passive
48	PIO0_13/FC3_TXD_SCL_MISO/SCT0_OUT4	passive
49	PIO0_14/FC3_CTS_SDA_SSEL0/SCT0_OUT5/FC1_SCK	passive
50	PIO0_15/FC3_RTS_SCL_SSEL1/FC4_SCK	passive
51	PIO1_12/FC5_RXD_SDA_MOSI/CTIMER1_MAT0/FC7_SCK/UTICK_CAP2	passive
52	PIO0_16/FC3_SSEL2/FC6_CTS_SDA_SSEL0/CTIMER3_MAT1/SWCLK	passive
53	PIO0_17/FC3_SSEL3/FC6_RTS_SCL_SSEL1/CTIMER3_MAT2/SWDIO	passive
54	PIO1_13/FC5_TXD_SCL_MISO/CTIMER1_MAT1/FC7_RXD_SDA_MOSI_DATA	passive
55	VSS55	passive
56	VDD56	passive
57	PIO1_14/FC2_RXD_SDA_MOSI/SCT0_OUT7/FC7_TXD_SCL_MISO_WS	passive
58	PIO0_18/FC5_TXD_SCL_MISO/SCT0_OUT0/CTIMER0_MAT0	passive
59	PIO0_19/FC5_SCK/SCT0_OUT1/CTIMER0_MAT1	passive
60	PIO0_20/FC5_RXD_SDA_MOSI/FC0_SCK/CTIMER3_CAP0	passive
61	PIO0_21/CLKOUT/FC0_TXD_SCL_MISO/CTIMER3_MAT0	passive
62	PIO1_15/SCT0_OUT5/CTIMER1_CAP3/FC7_CTS_SDA_SSEL0	passive
63	PIO0_22/CLKIN/FC0_RXD_SDA_MOSI/CTIMER3_MAT3	passive
64	RESET	passive

Provenance

Source: celestial-altium-symbols
Credit: Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence: LicenseRef-Celestial-Altium
Link method: none
Cross-check: not confirmed