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SI LABS EFM32TG230

celestial-altium-ARM_Cortex

Symbol

65 pins
Schematic symbol for SI LABS EFM32TG230
Units
4
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
1PA0/TIM0_CC0_0/LEU0_RX4/I2C0_SDA0/PRS_CH0_0/GPIO_EM4WU0passive
2PA1/TIM0_CC1_0/I2C0_SCL0/CMU_CLK1_0/PRS_CH1_0passive
3PA2/TIM0_CC2_0passive
4PA3passive
5PA4passive
6PA5passive
7PA6/GPIO_EM4WU1passive
8IO_VDD_0passive
9PC0/ACMP0_CH0/DAC0_OUT0ALT_0/OPAMP_OUT0ALT/TIM0_CC1_4/PCNT0_S0IN_2/US0_TX_5/US1_TX_1/I2C0_SDA_4passive
10PC1/ACMP0_CH1/DAC0_OUT0ALT_1/OPAMP_OUT0ALT/TIM0_CC2_4/PCNT0_S1IN/US0_RX_5/US1_RX_0/I2C0_SCL_4passive
11PC2/ACMP0_CH2/DAC0_OUT0ALT_2/OPAMP_OUT0ALTpassive
12PC3/ACMP0_CH3/DAC0_OUT0ALT_3/OPAMP_OUT0ALTpassive
13PC4/ACMP0_CH4/DAC0_P0/OPAMP_P0/LETIM0_OUT0_3passive
14PC5/ACMP0_CH5/DAC0_N0/OPAMP_N0/LETIM0_OUT1_3passive
15PB7/LFXTAL_P/TIM1_CC0_3/US0_TX_4/US1_CLK_0passive
16PB8/LFXTAL_N/TIM1_CC1_3/US0_RX_4/US1_CS_0passive
17PA8passive
18PA9passive
19PA10passive
20~{RESET}passive
21PB11/DAC0_OUT0/OPAMP_OUT0/TIM1_CC2_3/LETIM0_OUT0_1passive
22PB12/DAC0_OUT1/OPAMP_OUT1/LETIM0_OUT1_1passive
23AVDD_1passive
24PB13/HFXTAL_P/US0_CLK_4/LEU0_TX_1passive
25PB14/HFXTAL_N/US0_CS_4/LEU0_RX_1passive
26IO_VDD_3passive
27AVDD_0passive
28PD0/ADC0_CH0/DAC0_OUT0ALT_4/OPAMP_OUT0ALT/OPAMP_OUT2_1/US1_TX_1passive
29PD1/ADC0_CH1/DAC0_OUT1ALT_4/OPAMP_OUT1ALT/TIM0_CC0_3/US1_RX_1passive
30PD2/ADC0_CH2/TIM0_CC1_3/US1_CLK_1passive
31PD3/ADC0_CH3/OPAMP_N2/TIM0_CC2_3/US1_CS_1passive
32PD4/ADC0_CH4/OPAMP_P2/LEU0_TX_0passive
33PD5/ADC0_CH5/OPAMP_OUT2_0/LEU0_RX_0passive
34PD6/ADC0_CH6/DAC0_P1/OPAMP_P1/TIM1_CC0_4/LETIM0_OUT0_0/PCNT0_S0IN_3/US1_RX_2/I2C0_SDA_1passive
35PD7/ADC0_CH7/DAC0_N1/OPAMP_N1/TIM1_CC1_4/LETIM0_OUT1_0/PCNT0_S1IN_3/US1_TX_2/I2C0_SCL_1/CMU_CLK0_2passive
36PD8/CMU_CLK1_1passive
37PC6/ACMP0_CH6/I2C0_SDA_2/LES_CH6_0passive
38PC7/ACMP0_CH7/I2C0_SCL_2/LES_CH7_0passive
39VDD_DREG_passive
40DECOUPLEpassive
41PC8/ACMP1_CH0/US0_CS_2/LES_CH8_0passive
42PC9/ACMP1_CH1/US0_CLK_2/LES_CH9_0/GPIO_EM4WU2passive
43PC10/ACMP1_CH2/US0_RX_2/LES_CH10_0passive
44PC11/ACMP1_CH3/US0_TX_2/LES_CH11_0passive
45PC12/ACMP1_CH4/DAC0_OUT1ALT_0/OPAMP_OUT1ALT/CMU_CLK0_1/LES_CH12_0passive
46PC13/ACMP1_CH5/DAC0_OUT1ALT_1/OPAMP_OUT1ALT/TIM1_CC0_0/TIM1_CC2_4/PCNT0_S0IN_0passive
47PC14/ACMP1_CH6/DAC0_OUT1ALT_2/OPAMP_OUT1ALT/TIM1_CC1_0/PCNT0_S1IN_0/US0_CS_3passive
48PC15/ACMP1_CH7/DAC0_OUT1ALT_3/OPAMP_OUT1ALT/TIM1_CC2_0/US0_CLK_3/LES_CH15_0/DBG_SWO_1passive
49PF0/TIM0_CC0_5/LETIM0_OUT0_2/US1_CLK_2/LEU0_TX_3/I2C0_SDA_5/DBG_SWCLK_0passive
50PF1/TIM0_CC1_5/LETIM0_OUT1_2/US1_CS_2/LEU0_RX_3/I2C0_SCL_5/DBG_SWDIO_0/1/GPIO_EM4WU3passive
51PF2/TIM0_CC2_5/LEU0_TX_4/ACMP1_O_0/DBG_SWO_0/GPIO_EM4WU4passive
52PF3passive
53PF4passive
54PF5passive
55IO_VDD_5passive
56PE8passive
57PE9passive
58PE10/TIM1_CC0_1/US0_TX_0/BOOT_TXpassive
59PE11/TIM1_CC1_1/US0_RX_0/BOOT_RXpassive
60PE12/TIM1_CC2_1/US0_RX_3/US0_CLK_0/I2C0_SDA_6passive
61PE13/US0_TX_3/US0_CS_0/I2C0_SCL_6/GPIO_EM4WU5passive
62PE14/LEU0_TX_2passive
63PE15/LEU0_RX_2passive
64PA15passive
65GNDpassive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed