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ST STM32F405RGT6 64PIN

celestial-altium-ARM_Cortex

Symbol

64 pins
Schematic symbol for ST STM32F405RGT6 64PIN
Units
1
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
1VBATpassive
2PC13/RTC_OUTpassive
3PC14/OSC32_INpassive
4PC15/OSC32_OUTpassive
5PH0/OSC_INpassive
6PH1/OSC_OUTpassive
7~{RST}passive
8PC0/ADC123_IN10passive
9PC1/ADC123_IN11passive
10PC2/SPI2_MISO/I2S2ext_SD/ADC123_IN12passive
11PC3/SPI2_MOSI/I2S2_SD/ADC123_IN13passive
12VSSA/VREF-passive
13VDDA/VREF+passive
14PA0/WKUP/USART2_CTS/UART4_TX/ETH_MII_CRS/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETR/ADC123_IN0passive
15PA1/USART2_RTS/UART4_RX/ETH_RMII_REF_CLK/TIM5_CH2/TIM2_CH2/ADC123_IN1passive
16PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/ADC123_IN2passive
17PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/ADC123_IN3passive
18VSSpassive
19VDDpassive
20PA4/SPI1_NSS/SPI3_NSS/USART2_CK/I2S3_WS/ADC12_IN4/DAC_OUT1passive
21PA5/SPI1_SCK/TIM2_CH1_ETR/TIM8_CH1N/ADC12_IN5/DAC_OUT2passive
22PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/TIM3_CH1/TIM1_BKIN/ADC12_IN6passive
23PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/_TIM1_CH1N/ETH_RMII_CRS_DV/ADC12_IN7passive
24PC4/ADC12_IN14passive
25PC5/ADC12_IN15passive
26PB0/TIM3_CH3/TIM8_CH2N/TIM1_CH2N/ADC12_IN8passive
27PB1/TIM3_CH4/TIM8_CH3N/TIM1_CH3N/ADC12_IN9passive
28PB2/BOOT1passive
29PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/TIM2_CH3passive
30PB11/I2C2_SDA/USART3_RX/TIM2_CH4passive
31VCAP_1passive
32VDDpassive
33PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RXpassive
34PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TXpassive
35PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/USART3_RTS/TIM8_CH2N/I2S2ext_SDpassive
36PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/RTC_REFINpassive
37PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/TIM3_CH1passive
38PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/TIM3_CH2passive
39PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/DCMI_D2passive
40PC9/I2S_CKIN/_MCO2_/_TIM8_CH4/SDIO_D1_/_/I2C3_SDA_/_DCMI_D3_/_TIM3_CH4passive
41PA8/MCO1_/_USART1_CK/_TIM1_CH1/_I2C3_SCLpassive
42PA9/USART1_TX/_TIM1_CH2_/_I2C3_SMBA_/_DCMI_D0/_OTG_FS_VBUSpassive
43PA10/USART1_RX/_TIM1_CH3/_OTG_FS_ID/DCMI_D1passive
44PA11/USART1_CTS_/_CAN1_RX_TIM1_CH4/OTG_FS_DMpassive
45PA12/USART1_RTS_/_CAN1_TX/_TIM1_ETR/_OTG_FS_DPpassive
46PA13/JMS-SWDIOpassive
47VCAP_2passive
48VDDpassive
49PA14/JTCK-SWCLKpassive
50PA15/JTDI/_SPI3_NSS/_I2S3_WS/TIM2_CH1_ETR_/SPI1_NSSpassive
51PC10/SPI3_SCK_/_I2S3_CK/_UART4_TX/SDIO_D2_/_DCMI_D8_/_USART3_TXpassive
52PC11/UART4_RX/_SPI3_MISO_/_SDIO_D3/DCMI_D4/USART3_RX_/_I2S3ext_SDpassive
53PC12/UART5_TX/SDIO_CK_/_DCMI_D9_/_SPI3_MOSI_/I2S3_SD_/_USART3_CKpassive
54PD2/TIM3_ETR/UART5_RX/_SDIO_CMD_/_DCMI_D11passive
55PB3/JTDO/_TRACESWO/_SPI3_SCK_/_I2S3_CK_/_TIM2_CH2_/_SPI1_SCKpassive
56PB4/NJTRST/_SPI3_MISO_/_TIM3_CH1_/_SPI1_MISO_/_I2S3ext_SDpassive
57PB5/I2C1_SMBA/_CAN2_RX/TIM3_CH2_/_SPI1_MOSI/_SPI3_MOSI/DCMI_D10/_I2S3_SDpassive
58PB6/I2C1_SCL/_TIM4_CH1_/_CAN2_TX/DCMI_D5/USART1_TXpassive
59PB7/I2C1_SDA_/_FSMC_NL_/_DCMI_VSYNC/USART1_RX/_TIM4_CH2passive
60BOOT0passive
61PB8/TIM4_CH3/SDIO_D4/_TIM10_CH1/DCMI_D6/I2C1_SCL/CAN1_RXpassive
62PB9/SPI2_NSS/_I2S2_WS/TIM4_CH4/_TIM11_CH1/SDIO_D5/DCMI_D7/I2C1_SDA/CAN1_TXpassive
63VSSpassive
64VDDpassive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed