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MICROCHIP AVR64DA48 QFN48

celestial-altium-MCU_ATMEGA

Symbol

48 pins
Schematic symbol for MICROCHIP AVR64DA48 QFN48
Units
2
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
1PA5/PTC_XY5/SPI0_MISO/TCA0_WO5/TCD0_WOB1/USART0_RXDpassive
2PA6/CCL_LUT0_OUT0/PTC_XY6/SPI0_SCK/TCD0_WOC2/USART0_XCKpassive
3PA7/AC0/AC1/AC2/CLKCTRL/EVSYS/PTC/SPI0/TCD0/USART0/ZCD0/ZCD1passive
4PB0/CCL_LUT4_IN0/PTC_XY8/TCA0_WO0/TCA1_WO0/USART3_TXDpassive
5PB1/CCL_LUT4_IN1/PTC_XY9/TCA0_WO1/TCA1_WO1/USART3_RXDpassive
6PB2/CCL_LUT4_IN2/EVSYS_EVOUT1/PTC_XY10/TCA0_WO2/TCA1_WO2/TWI1_SDA/TWI1_SDA_DUAL/USART3_XCKpassive
7PB3/CCL_LUT4_OUT0/PTC_XY11/TCA0_WO3/TCA1_WO3/TWI1_SCL/TWI1_SCL_DUAL/USART3_XDIRpassive
8PB4/PTC_XY12/SPI1_MOSI/TCA0_WO4/TCA1_WO4/TCB2_WO0/TCD0_WOA/USART3_TXDpassive
9PB5/PTC_XY13/SPI1_MISO/TCA0_WO5/TCA1_WO5/TCB3_WO0/TCD0_WOB1/USART3_RXDpassive
10PC0/CCL_LUT1_IN0/SPI1_MOSI/TCA0_WO0/TCB2_WO0/USART1_TXDpassive
11PC1/CCL_LUT1_IN1/SPI1_MISO/TCA0_WO1/TCB3_WO0/USART1_RXDpassive
12PC2/CCL_LUT1_IN2/EVSYS_EVOUT2/SPI1_SCK/TCA0_WO2/TWI0_SDA/TWI0_SDA_DUAL/USART1_XCKpassive
13PC3/CCL_LUT1_OUT0/SPI1_SS/TCA0_WO3/TWI0_SCL/TWI0_SCL_DUAL/USART1_XDIRpassive
14VDD0passive
15GND0passive
16PC4/SPI1_MOSI/TCA0_WO4/TCA1_WO0/USART1_TXDpassive
17PC5/SPI1_MISO/TCA0_WO5/TCA1_WO1/USART1_RXDpassive
18PC6/AC0/AC1/AC2/CCL/SPI1/TCA1/TWI0/USART1passive
19PC7/EVSYS_EVOUT2/SPI1_SS/TWI0_SCL_DUAL/TWI0_SCL_DUAL/USART1_XDIR/ZCD0_OUT/ZCD1_OUTpassive
20PD0/~{AC0_N1}/~{AC1_N1}/~{AC2_N1}/ADC0_AIN0/CCL_LUT2_IN0/PTC_XY16/TCA0_WO0passive
21PD1/ADC0_AIN1/CCL_LUT2_IN1/PTC_XY17/TCA0_WO1/ZCD0_INpassive
22PD2/AC0_P0/AC1_P0/AC2_P0/ADC0_AIN2/CCL_LUT2_IN2/EVSYS_EVOUT3/PTC_XY18/TCA0_WO2passive
23PD3/~{AC0_N0}/AC1_P1/ADC0_AIN3/CCL_LUT2_OUT0/PTC_XY19/TCA0_WO3passive
24PD4/AC1_P2/AC2_P1/ADC0_AIN4/PTC_XY20/TCA0_WO4passive
25PD5/~{AC1_N0}/ADC0_AIN5/PTC_XY21/TCA0_WO5passive
26PD6/AC0_P3/AC1_P3/AC2_P3/ADC0_AIN6/CCL_LUT2_OUT0/DAC0_OUT0/PTC_XY22passive
27PD7/~{AC0_N2}/~{AC1_N2}/~{AC2_N0}/~{AC2_N2}/ADC0_AIN7/EVSYS_EVOUT3/PTC_XY23passive
28AVDDpassive
29AGNDpassive
30PE0/AC0_P1/ADC0_AIN8/PTC_XY24/SPI0_MOSI/TCA0_WO0/USART4_TXDpassive
31PE1/AC2_P2/ADC0_AIN9/PTC_XY25/SPI0_MISO/TCA0_WO1/USART4_RXDpassive
32PE2/AC0_P2/ADC0_AIN10/EVSYS_EVOUT4/PTC_XY26/SPI0_SCK/TCA0_WO2/USART4_XCKpassive
33PE3/ADC0_AIN11/PTC_XY27/SPI0_SS/TCA0_WO3/USART4_XDIR/ZCD1_INpassive
34PF0/ADC0_AIN16/CCL_LUT3_IN0/CLKCTRL_XTAL32K1/PTC_XY32/TCA0_WO0/TCD0_WOA/USART2_TXDpassive
35PF1/ADC0_AIN17/CCL_LUT3_IN1/CLKCTRL_XTAL32K2/PTC_XY33/TCA0_WO1/TCD0_WOB1/USART2_RXDpassive
36PF2/ADC0_AIN18/CCL_LUT3_IN2/EVSYS_EVOUT5/PTC_XY34/TCA0_WO2/TCD0_WOC2/TWI1_SDA/TWI1_SDA/USART2_XCKpassive
37PF3/ADC0_AIN19/CCL_LUT3_OUT0/PTC_XY35/TCA0_WO3/TCD0_WOD3/TWI1_SCL/TWI1_SCL/USART2_XDIRpassive
38PF4/ADC0_AIN20/PTC_XY36/TCA0_WO4/TCB0_WO0/USART2_TXDpassive
39PF5/ADC0_AIN21/PTC_XY37/TCA0_WO5/TCB1_WO0/USART2_RXDpassive
40PF6/RSTCTRL_RESETpassive
41UPDIpassive
42VDD1passive
43GND1passive
44PA0/CCL_LUT0_IN0/CLKCTRL_EXTCLK/PTC_XY0/TCA0_WO0/USART0_TXDpassive
45PA1/CCL_LUT0_IN1/PTC_XY1/TCA0_WO1/USART0_RXDpassive
46PA2/CCL_LUT0_IN2/EVSYS_EVOUT0/PTC_XY2/TCA0_WO2/TCB0_WO0/TWI0_SDA/TWI0_SDA/USART0_XCKpassive
47PA3/CCL_LUT0_OUT0/PTC_XY3/TCA0_WO3/TCB1_WO0/TWI0_SCL/TWI0_SCL/USART0_XDIRpassive
48PA4/PTC_XY4/SPI0_MOSI/TCA0_WO4/TCD0_WOA/USART0_TXDpassive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed