MICROCHIP ATTINY1626 VQFN20

celestial-altium-MCU_ATTINY

Symbol

20 pins

none

no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

none

no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

No footprint is linked, so there is nothing to cross-check.

Pin	Name	Type
1	PA2/ADC0_AIN2/CCL_LUT0_IN2/EVSYS_EVOUT0/SPI0_MISO/USART0_RXD/USART1_RXD	passive
2	PA3/ADC0_AIN3/CLKCTRL_CLKI/SPI0_SCK/TCA0_WO3/TCB1_WO0/USART0_XCK/USART1_XCK	passive
3	GND	passive
4	VCC	passive
5	PA4/ADC0_AIN4/CCL_LUT0_OUT0/SPI0_SS/TCA0_WO4/USART1_XDIR	passive
6	PA5/AC0_OUT0/ADC0_AIN5/CCL_LUT3_OUT0/TCA0_WO5/TCB0_WO0	passive
7	PA6/~{AC0_N0}/ADC0_AIN6	passive
8	PA7/AC0_P0/ADC0_AIN7/CCL_LUT1_OUT0/EVSYS_EVOUT0/USART0_XDIR	passive
9	PB5/AC0_P1/ADC0_AIN8/CLKCTRL_CLKO/TCA0_WO2	passive
10	PB4/~{AC0_N1}/ADC0_AIN9/CCL_LUT0_OUT0/RSTCTRL_RESET_ALT/TCA0_WO1	passive
11	PB3/CCL_LUT2_OUT0/CLKCTRL_TOSC1/TCA0_WO0/USART0_RXD	passive
12	PB2/CCL_LUT2_IN2/CLKCTRL_TOSC2/EVSYS_EVOUT1/TCA0_WO2/USART0_TXD	passive
13	PB1/AC0_P2/ADC0_AIN10/CCL_LUT2_IN1/TCA0_WO1/TWI0_SDA/USART0_XCK	passive
14	PB0/~{AC0_N2}/ADC0_AIN11/CCL_LUT2_IN0/TCA0_WO0/TWI0_SCL/USART0_XDIR	passive
15	PC0/ADC0_AIN12/CCL_LUT3_IN0/SPI0_SCK/TCB0_WO0/USART1_XCK	passive
16	PC1/ADC0_AIN13/CCL_LUT1_OUT0/CCL_LUT3_IN1/SPI0_MISO/USART1_RXD	passive
17	PC2/ADC0_AIN14/CCL_LUT3_IN2/EVSYS_EVOUT2/SPI0_MOSI/USART1_TXD	passive
18	PC3/ADC0_AIN15/CCL_LUT1_IN0/SPI0_SS/TCA0_WO3/USART1_XDIR	passive
19	PA0/CCL_LUT0_IN0/RSTCTRL_RESET/SYSCFG_UPDI	passive
20	PA1/ADC0_AIN1/CCL_LUT0_IN1/~{CPU_BREAK}/SPI0_MOSI/USART0_TXD/USART1_TXD	passive

Provenance

Source: celestial-altium-symbols
Credit: Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence: LicenseRef-Celestial-Altium
Link method: none
Cross-check: not confirmed