Get Trace

INFINEON XMC4100Q48

celestial-altium-MCU_INFINEON_XMC

Symbol

48 pins
Schematic symbol for INFINEON XMC4100Q48
Units
1
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
1P0.1/USB0_DRIVEVBUS/USIC1_DOUT01/CCU80_OUT11/LEDTS0_COL3/HRPWM0_CINB2/ERU0_0A0passive
2P0.0/CAN0_TXD0/CCU80_OUT12/LEDTS0_COL2/USIC1_C1_DX0D/HRPWM0_CINB1/ERU0_0B0passive
3USB_DMpassive
4USB_DPpassive
5VDDPpassive
6VDDCpassive
7HIB_IO_0passive
8RTC_XTAL1passive
9RTC_XTAL2passive
10VBATpassive
11P14.7/VADC0_GR0CH7/POSIF0_IN0Bpassive
12P14.6/VADC0_GR0CH6/POSIF0_IN1Bpassive
13P14.5/VADC0_GR0CH5/POSIF0_IN2Bpassive
14P14.4/VADC0_GR0CH4passive
15P14.3/VADC0_GR0CH3/VADC0_GR1CH3/CAN0_RXDC0Bpassive
16P14.0/VADC0_GR0CH0passive
17VSSA,VAGNDpassive
18VDDA,VAREFpassive
19P14.9/DAC0_OUT1/VADC0_GR1CH1passive
20P14.8/DAC0_OUT0/VADC0_GR1CH0passive
21P2.5/USIC0/CCU41/LEDTS0/HRPWM0/ERU0passive
22P2.4/VADC0/USIC0/CCU41/LEDTS0/HRPWM0/ERU0passive
23P2.3/VADC0/USIC0/CCU41/LEDTS0/ERU0passive
24P2.2/VADC0/CCU41/LEDTS0/USIC0/ERU0passive
25P2.1/LEDTS0_COL0/CPU0_DB_TDO_TRACESWO/CCU40_IN0C/ERU1_0B0passive
26P2.0/CAN0_TXD0/LEDTS0_COL1/CCU40_IN1C/ERU0_0B3passive
27VSSpassive
28VDDPpassive
29XTAL1passive
30XTAL2passive
31VDDCpassive
32PORSTpassive
33TMSpassive
34TCKpassive
35P1.5/CAN0/USIC0/CCU80/CCU41/ERU0/ERU1passive
36P1.4/WDT0/CAN0/CCU80/USIC0/HRPWM0/CCU41/ERU0passive
37P1.3/USIC0/CCU40/ERU1/POSIF0/HRPWM0passive
38P1.2/CCU40_OUT1/ERU1_PDOUT1/USIC0_DOUT30/USIC0_C0_HWIN3/POSIF0_IN1A/HRPWM0_CINA2/CCU40_IN1A/ERU1_2B0passive
39P1.1/USIC0/CCU40/ERU1/POSIF0/HRPWM0/ERU0passive
40P1.0/USIC0_SELO00/CCU40_OUT3/ERU1_PDOUT3/USIC0_C0_DX2A/HRPWM0_CINA0/CCU40_IN3A/ERU0_3B0passive
41VDDPpassive
42P0.8/USIC0_SCLKOUT0/HRPWM0_HROUT01/CCU80_CCU80IN1B/USIC0_C0_DX1B/ERU0_2A1/CPU0_DB_TRSTpassive
43P0.7/WDT0/USIC0/HRPWM0/CCU80/ERU0/CPU0passive
44P0.6/USIC1_SELO00/CCU80_OUT03/HRPWM0_HROUT03/CCU80_CCU80IN2B/USIC1_C0_DX2A/ERU0_3B2passive
45P0.5/USIC1_DOUT00/CCU80_OUT00/HRPWM0_HROUT00/USIC1_DOUT00/USIC1_C0_DX0B/USIC1_C0_HWIN0/ERU1_3A0passive
46P0.4/CCU80_OUT01/HRPWM0_HROUT12/USIC1_DOUT10/USIC1_C0_DX0A/USIC1_C0_HWIN1/ERU0_2B3passive
47P0.3/CCU80_OUT02/HRPWM0_HROUT02/USIC1_DOUT20/USIC1_C0_HWIN2/ERU1_3B0passive
48P0.2/USIC1_SELO11/CCU80_OUT10/HRPWM0_HROUT10/USIC1_DOUT30/USIC1_C0_HWIN3/ERU0_3B3passive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed