NUVOTON M251SC2AE
celestial-altium-MCU_NUVOTON
Symbol
64 pins- Units
- 3
- Kind
- part
- Grid
- on 1.27 mm
Footprint
noneno footprint linked
This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.
3D model
noneno 3D model
The footprint references no model, or the referenced model is not in the upstream package set.
Pins and pads
No footprint is linked, so there is nothing to cross-check.
| Pin | Name | Type |
|---|---|---|
| 1 | PB.6/EADC0_CH6/USCI1_DAT1/UART1_RXD/BPWM1_CH5/PWM1_BRAKE1/PWM1_CH5/INT4/ACMP1_O | passive |
| 2 | PB.5/EADC0_CH5/ACMP1_N/I2C0_SCL/USCI1_CTL0/SC0_CLK/PWM0_CH0/UART2_TXD/TM0/INT0 | passive |
| 3 | PB.4/EADC0_CH4/ACMP1_P1/I2C0_SDA/USCI1_CTL1/SC0_DAT/PWM0_CH1/UART2_RXD/TM1/INT1 | passive |
| 4 | PB.3/EADC0_CH3/ACMP0_N/I2C1_SCL/UART1_TXD/USCI1_DAT1/SC0_RST/PWM0_CH2/PWM0_BRAKE0/TM2/INT2 | passive |
| 5 | PB.2/EADC0_CH2/ACMP0_P1/I2C1_SDA/UART1_RXD/USCI1_DAT0/SC0_PWR/PWM0_CH3/TM3/INT3 | passive |
| 6 | PB.1/EADC0_CH1/UART2_TXD/USCI1_CLK/I2C1_SCL/QSPI0_MISO1/PWM0_CH4/PWM1_CH4/PWM0_BRAKE0 | passive |
| 7 | PB.0/EADC0_CH0/UART2_RXD/SPI0_I2SMCLK/I2C1_SDA/QSPI0_MOSI1/PWM0_CH5/PWM1_CH5/PWM0_BRAKE1 | passive |
| 8 | PA.11/ACMP0_P0/USCI0_CLK/BPWM0_CH0/TM0_EXT | passive |
| 9 | PA.10/ACMP1_P0/USCI0_DAT0/BPWM0_CH1/TM1_EXT | passive |
| 10 | PA.9/USCI0_DAT1/UART1_TXD/BPWM0_CH2/TM2_EXT | passive |
| 11 | PA.8/USCI0_CTL1/UART1_RXD/BPWM0_CH3/TM3_EXT/INT4 | passive |
| 12 | PF.6/SC0_CLK/SPI0_MOSI/TAMPER0 | passive |
| 13 | PF.14/PWM1_BRAKE0/PWM0_BRAKE0/PSIO0_CH3/PWM0_CH4/CLKO/TM3/INT5 | passive |
| 14 | PF.5/UART2_RXD/UART2_nCTS/PWM0_CH0/BPWM0_CH4/X32_IN/EADC0_ST | passive |
| 15 | PF.4/UART2_TXD/UART2_nRTS/PWM0_CH1/BPWM0_CH5/X32_OUT | passive |
| 16 | PF.3/UART0_TXD/I2C0_SCL/XT1_IN/BPWM1_CH0 | passive |
| 17 | PF.2/UART0_RXD/I2C0_SDA/QSPI0_CLK/XT1_OUT/BPWM1_CH1 | passive |
| 18 | PC.7/UART0_nCTS/I2C1_SMBAL/PWM1_CH2/BPWM1_CH0/TM0/INT3 | passive |
| 19 | PC.6/UART0_nRTS/I2C1_SMBSUS/PWM1_CH3/BPWM1_CH1/TM1/INT2 | passive |
| 20 | PA.7/UART0_TXD/I2C1_SCL/PWM1_CH4/BPWM1_CH2/ACMP0_WLAT/TM2/INT1 | passive |
| 21 | PA.6/UART0_RXD/I2C1_SDA/PWM1_CH5/BPWM1_CH3/ACMP1_WLAT/TM3/INT0 | passive |
| 22 | VSS | passive |
| 23 | VDD | passive |
| 24 | PD.15/PWM0_CH5/TM3/INT1 | passive |
| 25 | PA.5/QSPI0_MISO1/UART0_nCTS/UART0_TXD/I2C0_SCL/BPWM0_CH5/PWM0_CH0 | passive |
| 26 | PA.4/QSPI0_MOSI1/SPI0_I2SMCLK/SC0_nCD/UART0_nRTS/UART0_RXD/I2C0_SDA/BPWM0_CH4/PWM0_CH1 | passive |
| 27 | PA.3/QSPI0_SS/SPI0_SS/SC0_PWR/I2C0_SMBAL/UART1_TXD/I2C1_SCL/BPWM0_CH3/PWM0_CH2/CLKO/PWM1_BRAKE1 | passive |
| 28 | PA.2/QSPI0_CLK/SPI0_CLK/SC0_RST/I2C0_SMBSUS/UART1_RXD/I2C1_SDA/BPWM0_CH2/PWM0_CH3 | passive |
| 29 | PA.1/QSPI0_MISO0/SPI0_MISO/SC0_DAT/UART0_TXD/UART1_nCTS/BPWM0_CH1/PWM0_CH4 | passive |
| 30 | PA.0/QSPI0_MOSI0/SPI0_MOSI/SC0_CLK/UART0_RXD/UART1_nRTS/BPWM0_CH0/PWM0_CH5 | passive |
| 31 | VDDIO | passive |
| 32 | nRESET | passive |
| 33 | PF.0/ICE_DAT | passive |
| 34 | PF.1/ICE_CLK | passive |
| 35 | PC.5/QSPI0_MISO1/UART2_TXD/I2C1_SCL/PWM1_CH0/PSIO0_CH0 | passive |
| 36 | PC.4/QSPI0_MOSI1/UART2_RXD/I2C1_SDA/PWM1_CH1/PSIO0_CH1 | passive |
| 37 | PC.3/QSPI0_SS/UART2_nRTS/I2C0_SMBAL/PWM1_CH2/PSIO0_CH2 | passive |
| 38 | PC.2/QSPI0_CLK/UART2_nCTS/I2C0_SMBSUS/PWM1_CH3/PSIO0_CH3 | passive |
| 39 | PC.1/QSPI0_MISO0/UART2_TXD/I2C0_SCL/PWM1_CH4/ACMP0_O | passive |
| 40 | PC.0/QSPI0_MOSI0/UART2_RXD/I2C0_SDA/PWM1_CH5/ACMP1_O | passive |
| 41 | PD.3/USCI0_CTL1/SPI0_SS/USCI1_CTL0/UART0_TXD | passive |
| 42 | PD.2/USCI0_DAT1/SPI0_CLK/UART0_RXD | passive |
| 43 | PD.1/USCI0_DAT0/SPI0_MISO | passive |
| 44 | PD.0/USCI0_CLK/SPI0_MOSI/TM2 | passive |
| 45 | PA.12/I2C1_SCL/BPWM1_CH2 | passive |
| 46 | PA.13/I2C1_SDA/BPWM1_CH3 | passive |
| 47 | PA.14/UART0_TXD/BPWM1_CH4 | passive |
| 48 | PA.15/UART0_RXD/BPWM1_CH5 | passive |
| 49 | VSS | passive |
| 50 | LDO_CAP | passive |
| 51 | VDD | passive |
| 52 | PC.14/SPI0_I2SMCLK/USCI0_CTL0/QSPI0_CLK/TM1 | passive |
| 53 | PB.15/EADC0_CH15/SPI0_SS/USCI0_CTL1/UART0_nCTS/PSIO0_CH0/PWM1_CH0/TM0_EXT/PWM0_BRAKE1 | passive |
| 54 | PB.14/EADC0_CH14/SPI0_CLK/USCI0_DAT1/UART0_nRTS/PSIO0_CH1/PWM1_CH1/TM1_EXT/CLKO | passive |
| 55 | PB.13/EADC0_CH13/ACMP0_P3/ACMP1_P3/SPI0_MISO/USCI0_DAT0/UART0_TXD/PSIO0_CH2/PWM1_CH2/TM2_EXT | passive |
| 56 | PB.12/EADC0_CH12/ACMP0_P2/ACMP1_P2/SPI0_MOSI/USCI0_CLK/UART0_RXD/PSIO0_CH3/PWM1_CH3/TM3_EXT | passive |
| 57 | AVDD | passive |
| 58 | VREF | passive |
| 59 | AVSS | passive |
| 60 | PB.11/EADC0_CH11/UART0_nCTS/I2C1_SCL/SPI0_I2SMCLK/BPWM1_CH0 | passive |
| 61 | PB.10/EADC0_CH10/USCI1_CTL0/UART0_nRTS/I2C1_SDA/BPWM1_CH1 | passive |
| 62 | PB.9/EADC0_CH9/USCI1_CTL1/UART0_TXD/UART1_nCTS/I2C1_SMBAL/BPWM1_CH2 | passive |
| 63 | PB.8/EADC0_CH8/USCI1_CLK/UART0_RXD/UART1_nRTS/I2C1_SMBSUS/BPWM1_CH3 | passive |
| 64 | PB.7/EADC0_CH7/USCI1_DAT0/UART1_TXD/BPWM1_CH4/PWM1_BRAKE0/PWM1_CH4/INT5/ACMP0_O | passive |
Provenance
- Source
- celestial-altium-symbols
- Credit
- Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
- Licence
- LicenseRef-Celestial-Altium
- Link method
- none
- Cross-check
- not confirmed
