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NXP MCXN546VDF VFBGA

celestial-altium-MCU_NXP

Symbol

184 pins
Schematic symbol for NXP MCXN546VDF VFBGA
Units
7
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
A1PIO1_8/WUU0/LPTMR1/TRACE/FC4/FC5/CT/SCT0/FLEXIO0/PLU/ENET0/I3C1/TSI0/ADC1passive
A2PIO1_7/WUU0/TRIG/FC5/CT/SCT0/FLEXIO0/PLU/ENET0/SAI1/TSI0/ADC0passive
A4PIO1_4/WUU0/FREQME/FC3/FC5/CT1/SCT0/FLEXIO0/ENET0/SAI0/TSI0/ADC0/CMP0passive
A6~{PIO0_25}/FC1_P1/CT0_MAT1/~{ADC0_B17}passive
A8PIO0_21/FC0_P5/FC1_P1/CT_INP1/FLEXIO0_D5/I3C0_SCL/TSI0_CH16/ADC0_A13passive
B1PIO1_9/TRACE/FC4/FC5/CT/SCT0/FLEXIO0/PLU/ENET0/I3C1/TSI0/ADC1passive
B2~{PIO1_6}/TRIG_IN2/FC3_P6/FC5_P2/CT_INP6/SCT0_IN0/FLEXIO0_D14/ENET0_TXD0/~{SAI1_RX_BCLK}/TSI0_CH6/ADC0_A22passive
B3PIO1_5/FREQME/FC3/FC5/CT1/SCT0/FLEXIO0/ENET0/SAI0/TSI0/ADC0/CMP0passive
B4PIO1_3/WUU0/TRIG/FC3/CT1/SCT0/FLEXIO0/ENET0/SAI1/CAN0/TSI0/ADC0/CMP0passive
B6~{PIO0_24}/FC1_P0/CT0_MAT0/~{ADC0_B16}passive
B7~{PIO0_23}/WUU0_IN5/~{EWM0_OUT_b}/FC1_P3/CT_INP3/FLEXIO0_D7/ADC0_A15passive
B8PIO0_22/EWM0_IN/FC0_P6/FC1_P2/CT_INP2/FLEXIO0_D6/I3C0_PUR/ADC0_A14/CMP1_IN2passive
C3PIO1_10/TRACE/FC4/FC5/CT2/SCT0/FLEXIO0/PLU/ENET0/CAN0/TSI0/ADC1passive
C4PIO1_2/TRIG/FC3/FC4/CT1/SCT0/FLEXIO0/ENET0/SAI1/CAN0/TSI0/ADC0passive
C5PIO1_1/TRIG_IN1/FC3_P1/FC4_P5/CT_INP5/SCT0_OUT7/FLEXIO0_D9/SAI1_TX_FS/TSI0_CH1/ADC0_A17/CMP1_IN0passive
C6~{PIO1_0}/WUU0/LPTMR0/TRIG/FC3/FC4/CT/SCT0/FLEXIO0/SAI1/TSI0/ADC0/CMP0passive
C8PIO0_20/WUU0_IN4/FC0_P4/FC1_P0/CT_INP0/FLEXIO0_D4/I3C0_SDA/TSI0_CH15/ADC0_A12passive
C9~{PIO0_19}/WUU0_IN3/~{EWM0_OUT_b}/FC0_P3/CT0_MAT3/FLEXIO0_D3/HSCMP1_OUT/TSI0_CH14/ADC0_A11passive
D1PIO1_13/TRIG_IN3/FC4_P5/FC3_P1/CT2_MAT3/SCT0_OUT5/FLEXIO0_D21/PLU_OUT3/ENET0_RXDV/TSI0_CH22/ADC1_A13passive
D2PIO1_12/WUU0/TRACE/FC4/FC3/CT2/SCT0/FLEXIO0/PLU/ENET0/TSI0/ADC1passive
D3PIO1_11/WUU0/TRACE/FC4/CT2/SCT0/FLEXIO0/PLU/ENET0/I3C1/CAN0/TSI0/ADC1passive
D4PIO1_14/FC4_P6/FC3_P2/CT_INP10/SCT0_IN4/FLEXIO0_D22/PLU_IN2/ENET0_RXD0/TSI0_CH23/ADC1_A14passive
D6VSSpassive
D7~{PIO0_31}/CT_INP3/~{ADC0_B23}passive
D9VSSpassive
E4PIO1_15/WUU0/FC3/CT/SCT0/FLEXIO0/PLU/ENET0/I3C1/TSI0/ADC1passive
E5VSSpassive
E7~{PIO0_30}/FC1_P6/FC0_P6/CT_INP2/~{ADC0_B22}passive
E8~{PIO0_28}/FC1_P4/FC0_P4/CT_INP0/~{ADC0_B20}passive
F1PIO1_30/TRIG_OUT3/CT_INP16/SCT0_OUT8/SAI0_MCLK/XTAL48Mpassive
F2PIO1_31/TRIG_IN4/CT_INP17/SCT0_OUT9/EXTAL48Mpassive
F3~{RESET_B}passive
F4PIO1_17/FC5_P1/FC3_P5/CT_INP13/SCT0_OUT7/FLEXIO0_D25/PLU_OUT5/ENET0_RXD3/I3C1_SCL/ADC1_A17passive
F6PIO1_16/WUU0_IN14/FC5_P0/FC3_P4/CT_INP12/SCT0_OUT6/FLEXIO0_D24/PLU_OUT4/ENET0_RXD2/I3C1_SDA/ADC1_A16passive
F8~{PIO0_29}/FC1_P5/FC0_P5/CT_INP1/~{ADC0_B21}passive
G2VSSpassive
G4PIO1_18/FREQME/FC5/FC3/CT3/SCT0/FLEXIO0/PLU/ENET0/CAN0/ADC1passive
G5PIO1_19/WUU0/FREQME/FC5/CT3/SCT0/FLEXIO0/PLU/ENET0/CAN0/ADC1passive
G7VDDpassive
H1~{PIO2_1}/TRACE_CLK/SDHC0_D4/SCT0_IN1/FLEXIO0_D9/~{FLEXSPI0_B_DQS}/SAI0_RX_FSpassive
H2~{PIO2_0}/TRIG_IN5/FC9_P6/SDHC0_D5/SCT0_IN0/FLEXIO0_D8/~{FLEXSPI0_B_SS1_b}/~{SAI0_RX_BCLK}passive
H3~{PIO2_2}/WUU0_IN16/CLKOUT/FC9_P3/SDHC0_D1/SCT0_OUT0/FLEXIO0_D10/~{FLEXSPI0_B_SS0_b}/SAI0_TXD0passive
H5VSSpassive
H6VDDpassive
H8VDDpassive
H9VSSpassive
J3~{PIO2_3}/FC9_P1/SDHC0_D0/SCT0_OUT1/FLEXIO0_D11/~{FLEXSPI0_B_SCLK}/SAI0_RXD0passive
J4VSSpassive
J8VSSpassive
K1~{PIO2_5}/TRIG_OUT3/FC9_P2/SDHC0_CMD/SCT0_OUT3/FLEXIO0_D13/~{FLEXSPI0_B_DATA1}/SAI0_TXD1passive
K2~{PIO2_6}/TRIG_IN4/FC9_P4/SDHC0_D3/SCT0_OUT4/FLEXIO0_D14/~{FLEXSPI0_B_DATA2}/~{SAI0_TX_BCLK}passive
K3~{PIO2_4}/WUU0_IN17/FC9_P0/SDHC0_CLK/SCT0_OUT2/FLEXIO0_D12/~{FLEXSPI0_B_DATA0}/SAI0_RXD1passive
K5PIO1_20/TRIG_IN2/FC5_P4/FC4_P0/CT3_MAT2/SCT0_OUT8/FLEXIO0_D28/PLU_OUT6/ENET0_MDC/ADC1_A20/CMP1_IN3passive
K6VDD_LDO_COREpassive
K8VDD_P21passive
K9VSSpassive
L2~{PIO2_7}/TRIG_IN5/FC9_P5/SDHC0_D2/SCT0_OUT5/FLEXIO0_D15/~{FLEXSPI0_B_DATA3}/SAI0_TX_FSpassive
L4PIO1_22/TRIG_IN3/FC5_P6/FC4_P2/CT_INP14/SCT0_OUT4/FLEXIO0_D30/ADC1_A22passive
L5PIO1_21/TRIG/FC5/FC4/CT3/SCT0/FLEXIO0/PLU/ENET0/SAI1/ADC1passive
L7VDD_P20passive
M1~{PIO2_9}/TRACE_DATA1/SDHC0_D6/SCT0_IN3/FLEXIO0_D17/~{FLEXSPI0_B_DATA5}/SAI1_RXD0passive
M2~{PIO2_8}/TRACE_DATA0/SDHC0_D7/SCT0_IN2/FLEXIO0_D16/~{FLEXSPI0_B_DATA4}/SAI1_TXD0passive
M3~{PIO2_10}/TRACE_DATA2/SCT0_IN4/FLEXIO0_D18/~{FLEXSPI0_B_DATA6}/SAI1_RXD1passive
M4PIO1_23/FC4_P3/CT_INP15/SCT0_OUT5/FLEXIO0_D31/ADC1_A23passive
M6PIO4_4/FC2_P4/CT_INP14/PLU_IN4passive
M8PIO4_5/FC2_P5/CT_INP15/PLU_IN5passive
N4~{PIO2_11}/TRACE_DATA3/SCT0_IN5/FLEXIO0_D19/~{FLEXSPI0_B_DATA7}/SAI1_TXD1passive
N5VDD_P41passive
N7PIO4_6/TRIG_OUT4/FC2_P6/CT_INP18/PLU_CLKpassive
N8PIO4_14/CT4_MAT2/FLEXIO0_D22/PLU_OUT2passive
P1PIO4_0/WUU0_IN18/TRIG_IN6/FC2_P0/CT_INP16/PLU_IN0passive
P2PIO4_1/TRIG_IN7/FC2_P1/CT_INP17/PLU_IN1passive
P3ADC0_A0passive
P4VDD_P40passive
P6VSSpassive
P7VSSpassive
P9VSSpassive
R3~{ADC0_B0}passive
R4VDD_ANApassive
R5VREFHpassive
R6VREFLpassive
R8PIO4_16/FC2_P2/USB1_OTG_PWR/CT3_MAT0/FLEXIO0_D24/PLU_OUT4/ADC0_A6passive
R9~{PIO4_17}/TRIG_IN9/FC2_P3/USB1_OTG_OC/CT3_MAT1/FLEXIO0_D25/PLU_OUT5/~{ADC0_B6}passive
T1PIO4_2/TRIG_IN6/FC2_P2/CT_INP12/PLU_IN2/DAC0_OUT/ADC0_A4/ADC1_A4/CMP0_IN4N/CMP1_IN4Npassive
T2ADC1_A0passive
T3~{ADC1_B0}passive
T4PIO4_7/CT_INP19passive
T6PIO4_12/WUU0_IN20/USB0_VBUS_DET/FC2_P0/CT4_MAT0/FLEXIO0_D20/PLU_OUT0/CAN0_RXD/ADC0_A5/ADC1_A5passive
T7~{PIO4_13}/TRIG_IN8/FC2_P1/USB1_ID/CT4_MAT1/FLEXIO0_D21/PLU_OUT1/CAN0_TXD/~{ADC0_B5}/~{ADC1_B5}passive
T8PIO4_15/WUU0_IN21/TRIG_OUT4/USB1_VBUS_DIG/CT4_MAT3/FLEXIO0_D23/PLU_OUT3/ADC0_A1/CMP0_IN4Ppassive
U1~{PIO4_3}/WUU0_IN19/TRIG_IN7/FC2_P3/CT_INP13/PLU_IN3/~{ADC0_B4}/~{ADC1_B4}/CMP0_IN5N/CMP1_IN5Npassive
U2ADC0_A3/ADC1_A3passive
U4VREFO/ADC0_A7/ADC1_A7passive
U6OPAMP0_INNpassive
U8OPAMP1_INNpassive
A10PIO0_17/FC0_P1/CT0_MAT1/UTICK_CAP3/FLEXIO0_D1/PDM0_DATA0/I3C0_SCL/TSI0_CH12/ADC0_A9passive
A12~{PIO0_9}/FC0_P5/CT_INP1/FLEXIO0_D1/~{ADC0_B9}passive
A14~{PIO0_5}/~{EWM0_OUT_b}/FC0_P1/FC1_P5/CT0_MAT3/UTICK_CAP3/PDM0_DATA0/TSI0_CH9passive
A16PIO0_1/TCLK/SWCLK/FC1_P1/CT_INP1passive
A17PIO0_0/TMS/SWDIO/FC1_P0/CT_INP0passive
B10PIO0_16/WUU0_IN2/FC0_P0/CT0_MAT0/UTICK_CAP2/FLEXIO0_D0/PDM0_CLK/I3C0_SDA/TSI0_CH11/ADC0_A8passive
B11~{PIO0_11}/CT0_MAT1/FLEXIO0_D3/~{ADC0_B11}passive
B12~{PIO0_10}/FC0_P6/CT0_MAT0/FLEXIO0_D2/~{ADC0_B10}passive
B14PIO0_4/WUU0_IN0/EWM0_IN/FC0_P0/FC1_P4/CT0_MAT2/UTICK_CAP2/HSCMP1_OUT/PDM0_CLK/TSI0_CH8passive
B15PIO0_3/TDI/FC1_P3/CT0_MAT1/UTICK_CAP1/HSCMP0_OUT/CMP1_IN1passive
B16PIO0_2/TDO/SWO/FC1_P2/CT0_MAT0/UTICK_CAP0/I3C0_PURpassive
B17~{PIO3_0}/WUU0_IN22/TRIG_IN0/FC7_P3/CT_INP16/PWM0_A0/FLEXIO0_D8/~{FLEXSPI0_A_SS0_b}passive
C10PIO0_18/EWM0_IN/FC0_P2/CT0_MAT2/FLEXIO0_D2/HSCMP0_OUT/PDM0_DATA1/TSI0_CH13/ADC0_A10passive
C12~{PIO0_8}/FC0_P4/CT_INP0/FLEXIO0_D0/~{ADC0_B8}passive
C13PIO0_7/WUU0_IN1/FC0_P3/CT_INP3passive
C14~{PIO0_6}/~{ISPMODE_N}/FC0_P2/FC1_P6/CT_INP2/PDM0_DATA1/CLKOUT/TSI0_CH10passive
C15~{PIO3_1}/TRIG_IN1/FC6_P0/FC7_P6/CT_INP17/~{PWM0_B0}/FLEXIO0_D9/~{FLEXSPI0_A_SS1_b}/FREQME_CLK_OUT0passive
D11~{PIO0_12}/FC1_P4/FC0_P0/CT0_MAT2/FLEXIO0_D4/~{ADC0_B12}passive
D12VSSpassive
D14~{PIO3_7}/FC6_P6/FC7_P1/CT4_MAT3/~{PWM0_B1}/FLEXIO0_D15/FLEXSPI0_A_SCLK/SIM0_VCCEN/SAI0_MCLKpassive
D15PIO3_2/FC7_P0/CT4_MAT0/PWM0_X0/FLEXIO0_D10/SIM1_PDpassive
D16PIO3_3/FC7_P1/CT4_MAT1/PWM0_X1/FLEXIO0_D11/SIM1_RSTpassive
D17PIO3_6/CLKOUT/FC6/CT4/PWM0/FLEXIO0/FLEXSPI0/SIM1/SAI1/FREQMEpassive
E10~{PIO0_27}/FC1_P3/CT0_MAT3/~{ADC0_B19}passive
E11~{PIO0_14}/FC1_P6/FC0_P2/CT_INP2/UTICK_CAP0/FLEXIO0_D6/~{ADC0_B14}passive
E13VSSpassive
E14~{PIO3_8}/WUU0_IN23/FC6_P4/FC7_P0/CT_INP4/PWM0_A2/FLEXIO0_D16/FLEXSPI0_A_DATA0/SIM0_PD/~{SAI0_TX_BCLK}passive
F10~{PIO0_26}/FC1_P2/CT0_MAT2/~{ADC0_B18}passive
F12~{PIO0_13}/FC1_P5/FC0_P1/CT0_MAT3/FLEXIO0_D5/~{ADC0_B13}passive
F14PIO3_4/FC7_P2/CT_INP18/PWM0_X2/FLEXIO0_D12/SIM1_CLKpassive
F15~{PIO3_9}/FC6_P5/FC7_P2/CT_INP5/~{PWM0_B2}/FLEXIO0_D17/FLEXSPI0_A_DATA1/SIM0_RST/SAI0_TX_FSpassive
F16~{PIO3_11}/WUU0_IN24/FC6_P3/FC7_P5/CT1_MAT1/~{PWM0_B3}/FLEXIO0_D19/FLEXSPI0_A_DATA3/SIM0_IO/SAI0_RXD0passive
F17PIO3_10/FC6_P2/FC7_P4/CT1_MAT0/PWM0_A3/FLEXIO0_D18/FLEXSPI0_A_DATA2/SIM0_CLK/SAI0_TXD0passive
G11VDD_P30passive
G13~{PIO0_15}/FC0_P3/CT_INP3/UTICK_CAP1/FLEXIO0_D7/~{ADC0_B15}passive
G14PIO3_5/FC7_P3/CT_INP19/PWM0_X3/FLEXIO0_D13/SIM1_IOpassive
G16PIO3_12/FC7_P4/FC6_P4/CT1_MAT2/FLEXIO0_D20/FLEXSPI0_A_DATA4/SAI0_RXD1passive
H10VDD_P31passive
H12VDD_P42passive
H13VSSpassive
H15PIO3_15/FC8_P1/CT_INP7/FLEXIO0_D23/FLEXSPI0_A_DATA7/SAI0_RX_FSpassive
H16PIO3_13/FC7_P5/FC6_P5/CT1_MAT3/FLEXIO0_D21/FLEXSPI0_A_DATA5/SAI0_TXD1passive
H17~{PIO3_14}/WUU0_IN25/FC8_P0/CT_INP6/FLEXIO0_D22/FLEXSPI0_A_DATA6/~{SAI0_RX_BCLK}passive
J10VSSpassive
J14VSSpassive
J15~{PIO3_16}/FC8_P2/CT_INP8/FLEXIO0_D24/SIM0_CLK/~{SAI1_TX_BCLK}passive
K10VDD_CORE/VOUT_COREpassive
K12~{PIO5_5}/TRIG_IN10/LPTMR0_ALT2/TAMPER3/~{ADC1_B13}passive
K13~{PIO5_6}/TRIG_OUT6/LPTMR1_ALT2/TAMPER4/~{ADC1_B14}passive
K15PIO3_17/WUU0_IN26/FC8_P3/CT_INP9/FLEXIO0_D25/SIM0_IO/SAI1_TX_FSpassive
K16~{PIO3_18}/FC6_P6/CT2_MAT0/FLEXIO0_D26/~{SAI1_RX_BCLK}passive
K17PIO3_19/FC7_P6/CT2_MAT1/FLEXIO0_D27/SAI1_RX_FSpassive
L11VDD_COREpassive
L13~{PIO5_7}/TRIG_IN11/TAMPER5/~{ADC1_B15}passive
L14~{PIO5_8}/TRIG_OUT7/TAMPER6/~{ADC1_B16}passive
L16PIO3_21/TRIG_OUT1/FC8_P5/FC6_P1/CT2_MAT3/FLEXIO0_D29/SIM0_RST/SAI1_RXD0passive
M10~{PIO5_2}/~{VBAT_WAKEUP_b}/SPC_LPREQ/TAMPER0/~{ADC1_B10}passive
M12~{PIO5_4}/TRIG_OUT7/SPC_LPREQ/TAMPER2/~{ADC1_B12}passive
M14~{PIO5_9}/TAMPER7/~{ADC1_B17}passive
M15PIO3_23/FC6_P3/CT_INP11/FLEXIO0_D31/SAI1_TXD1passive
M16PIO3_22/FC8_P6/FC6_P2/CT_INP10/FLEXIO0_D30/SIM0_VCCEN/SAI1_RXD1passive
M17PIO3_20/WUU0_IN27/TRIG_OUT0/FC8_P4/FC6_P0/CT2_MAT2/FLEXIO0_D28/SIM0_PD/SAI1_TXD0passive
N10PIO4_18/CT3_MAT2/FLEXIO0_D26/PLU_OUT6passive
N11~{PIO5_3}/TRIG_IN11/RTC_CLKOUT/TAMPER1/~{ADC1_B11}passive
N13VSSpassive
N14VDD_SYSpassive
P11USB1_IDpassive
P12VSSpassive
P14VDDpassive
P15VDD_LDO_SYS/VOUT_SYSpassive
P16VSSpassive
P17DCDC_LXpassive
R10~{PIO4_19}/TRIG_OUT5/CT3_MAT3/FLEXIO0_D27/PLU_OUT7/~{ADC0_B1}/CMP1_IN4Ppassive
R12VDD_USBpassive
R13USB1_DPpassive
R14USB1_DMpassive
R15VDD_DCDCpassive
T10PIO4_20/TRIG_IN8/FC2_P4/CT2_MAT0/FLEXIO0_D28/ADC1_A6passive
T11~{PIO4_21}/TRIG_IN9/FC2_P5/CT2_MAT1/FLEXIO0_D29/~{ADC1_B6}passive
T12PIO4_22/CT2_MAT2/FLEXIO0_D30passive
T14USB0_DM/WUU0_IN28passive
T15USB0_DP/WUU0_IN29passive
T16VDDpassive
T17~{VDD_BAT}passive
U10OPAMP2_INNpassive
U12~{PIO4_23}/TRIG_OUT5/FC2_P6/CT2_MAT3/FLEXIO0_D31/ADC0_A2/~{ADC0_B2}/~{ADC1_B3}passive
U14USB1_VBUSpassive
U16~{PIO5_0}/TRIG_IN10/LPTMR0_ALT2/EXTAL32K/~{ADC1_B8}passive
U17~{PIO5_1}/TRIG_OUT6/LPTMR1_ALT2/XTAL32K/~{ADC1_B9}passive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed