ST MICROELECTRONICS STM32F072R(

celestial-altium-MCU_STM32

Symbol

64 pins
Schematic symbol for ST MICROELECTRONICS STM32F072R(
Units
3
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
1VBATpassive
2PC13/RTC_OUT_ALARM/RTC_OUT_CALIB/RTC_TAMP1/RTC_TS/SYS_WKUP2passive
3PC14-OSC32_IN/RCC_OSC32_INpassive
4PC15-OSC32_OUT/RCC_OSC32_OUTpassive
5PF0-OSC_IN/CRS_SYNC/RCC_OSC_INpassive
6PF1-OSC_OUT/RCC_OSC_OUTpassive
7NRSTpassive
8PC0/ADC_IN10passive
9PC1/ADC_IN11passive
10PC2/ADC_IN12/I2S2_MCK/SPI2_MISOpassive
11PC3/ADC_IN13/I2S2_SD/SPI2_MOSIpassive
12VSSApassive
13VDDApassive
14PA0/ADC/COMP1/RTC/SYS/TIM2/TSC/USART2/USART4passive
15PA1/ADC_IN1/COMP1_INP/TIM15_CH1N/TIM2_CH2/TSC_G1_IO2/USART2_DE/USART2_RTS/USART4_RXpassive
16PA2/ADC_IN2/COMP2_INM/COMP2_OUT/SYS_WKUP4/TIM15_CH1/TIM2_CH3/TSC_G1_IO3/USART2_TXpassive
17PA3/ADC_IN3/COMP2_INP/TIM15_CH2/TIM2_CH4/TSC_G1_IO4/USART2_RXpassive
18VSSpassive
19VDDpassive
20PA4/ADC_IN4/COMP1_INM/COMP2_INM/DAC_OUT1/I2S1_WS/~{SPI1_NSS}/TIM14_CH1/TSC_G2_IO1/USART2_CKpassive
21PA5/ADC_IN5/CEC/COMP1_INM/COMP2_INM/DAC_OUT2/I2S1_CK/SPI1_SCK/TIM2_CH1/TIM2_ETR/TSC_G2_IO2passive
22PA6/ADC_IN6/COMP1_OUT/I2S1_MCK/SPI1_MISO/TIM16_CH1/~{TIM1_BKIN}/TIM3_CH1/TSC_G2_IO3/USART3_CTSpassive
23PA7/ADC_IN7/COMP2_OUT/I2S1_SD/SPI1_MOSI/TIM14_CH1/TIM17_CH1/TIM1_CH1N/TIM3_CH2/TSC_G2_IO4passive
24PC4/ADC_IN14/USART3_TXpassive
25PC5/ADC_IN15/SYS_WKUP5/TSC_G3_IO1/USART3_RXpassive
26PB0/ADC_IN8/TIM1_CH2N/TIM3_CH3/TSC_G3_IO2/USART3_CKpassive
27PB1/ADC_IN9/TIM14_CH1/TIM1_CH3N/TIM3_CH4/TSC_G3_IO3/USART3_DE/USART3_RTSpassive
28PB2/TSC_G3_IO4passive
29PB10/CEC/I2C2_SCL/I2S2_CK/SPI2_SCK/TIM2_CH3/TSC_SYNC/USART3_TXpassive
30PB11/I2C2_SDA/TIM2_CH4/TSC_G6_IO1/USART3_RXpassive
31VSSpassive
32VDDpassive
33PB12/I2S2_WS/~{SPI2_NSS}/~{TIM15_BKIN}/~{TIM1_BKIN}/TSC_G6_IO2/USART3_CKpassive
34PB13/I2C2_SCL/I2S2_CK/SPI2_SCK/TIM1_CH1N/TSC_G6_IO3/USART3_CTSpassive
35PB14/I2C2_SDA/I2S2_MCK/SPI2_MISO/TIM15_CH1/TIM1_CH2N/TSC_G6_IO4/USART3_DE/USART3_RTSpassive
36PB15/I2S2_SD/RTC_REFIN/SPI2_MOSI/SYS_WKUP7/TIM15_CH1N/TIM15_CH2/TIM1_CH3Npassive
37PC6/TIM3_CH1passive
38PC7/TIM3_CH2passive
39PC8/TIM3_CH3passive
40PC9/DAC_EXTI9/TIM3_CH4passive
41PA8/CRS_SYNC/RCC_MCO/TIM1_CH1/USART1_CKpassive
42PA9/DAC_EXTI9/~{TIM15_BKIN}/TIM1_CH2/TSC_G4_IO1/USART1_TXpassive
43PA10/~{TIM17_BKIN}/TIM1_CH3/TSC_G4_IO2/USART1_RXpassive
44PA11/CAN_RX/COMP1_OUT/TIM1_CH4/TSC_G4_IO3/USART1_CTS/USB_DMpassive
45PA12/CAN_TX/COMP2_OUT/TIM1_ETR/TSC_G4_IO4/USART1_DE/USART1_RTS/USB_DPpassive
46PA13/IR_OUT/SYS_SWDIO/~{USB_NOE}passive
47VSSpassive
48VDDIO2passive
49PA14/SYS_SWCLK/USART2_TXpassive
50PA15/I2S1_WS/~{SPI1_NSS}/TIM2_CH1/TIM2_ETR/USART2_RX/USART4_DE/USART4_RTSpassive
51PC10/USART3_TX/USART4_TXpassive
52PC11/USART3_RX/USART4_RXpassive
53PC12/USART3_CK/USART4_CKpassive
54PD2/TIM3_ETR/USART3_DE/USART3_RTSpassive
55PB3/I2S1_CK/SPI1_SCK/TIM2_CH2/TSC_G5_IO1passive
56PB4/I2S1_MCK/SPI1_MISO/~{TIM17_BKIN}/TIM3_CH1/TSC_G5_IO2passive
57PB5/I2C1_SMBA/I2S1_SD/SPI1_MOSI/SYS_WKUP6/~{TIM16_BKIN}/TIM3_CH2passive
58PB6/I2C1_SCL/TIM16_CH1N/TSC_G5_IO3/USART1_TXpassive
59PB7/I2C1_SDA/TIM17_CH1N/TSC_G5_IO4/USART1_RX/USART4_CTSpassive
60BOOT0passive
61PB8/CAN_RX/CEC/I2C1_SCL/TIM16_CH1/TSC_SYNCpassive
62PB9/CAN_TX/DAC_EXTI9/I2C1_SDA/I2S2_WS/IR_OUT/~{SPI2_NSS}/TIM17_CH1passive
63VSSpassive
64VDDpassive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed