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ST MICROELECTRONICS STM32F378VC_2

celestial-altium-MCU_STM32

Symbol

100 pins
Schematic symbol for ST MICROELECTRONICS STM32F378VC_2
Units
4
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
1PE2/SYS_TRACECK/TSC_G7_IO1passive
2PE3/SYS_TRACED0/TSC_G7_IO2passive
3PE4/SYS_TRACED1/TSC_G7_IO3passive
4PE5/SYS_TRACED2/TSC_G7_IO4passive
5PE6/RTC_TAMP3/SYS_TRACED3/SYS_WKUP3passive
6VBATpassive
7PC13/RTC_OUT_ALARM/RTC_OUT_CALIB/RTC_TAMP1/RTC_TS/SYS_WKUP2passive
8PC14-OSC32_IN/RCC_OSC32_INpassive
9PC15-OSC32_OUT/ADC1_EXTI15/RCC_OSC32_OUT/SDADC1_EXTI15/SDADC2_EXTI15/SDADC3_EXTI15passive
10PF9/DAC1_EXTI9/DAC2_EXTI9/TIM14_CH1passive
11PF10passive
12PF0-OSC_IN/I2C2_SDA/RCC_OSC_INpassive
13PF1-OSC_OUT/I2C2_SCL/RCC_OSC_OUTpassive
14NRSTpassive
15PC0/ADC1_IN10/TIM5_CH1/TIM5_ETRpassive
16PC1/ADC1_IN11/TIM5_CH2passive
17PC2/ADC1_IN12/I2S2_MCK/SPI2_MISO/TIM5_CH3passive
18PC3/ADC1_IN13/I2S2_SD/SPI2_MOSI/TIM5_CH4passive
19PF2/I2C2_SMBApassive
20VSSA/VREF-passive
21VDDApassive
22VREF+passive
23PA0/ADC1/COMP1/RTC/SYS/TIM19/TIM2/TIM5/TSC/USART2passive
24PA1/ADC1/COMP1/I2S3/RTC/SPI3/TIM15/TIM19/TIM2/TIM5/TSC/USART2passive
25PA2/ADC1/COMP2/I2S3/SPI3/TIM15/TIM19/TIM2/TIM5/TSC/USART2passive
26PA3/ADC1_IN3/COMP2_INP/I2S3_SD/SPI3_MOSI/TIM15_CH2/TIM19_CH4/TIM2_CH4/TIM5_CH4/TSC_G1_IO4/USART2_RXpassive
27PF4passive
28VDDpassive
29PA4/ADC1_IN4/DAC1_OUT1/I2S1_WS/I2S3_WS/~{SPI1_NSS}/~{SPI3_NSS}/TIM12_CH1/TIM3_CH2/TSC_G2_IO1/USART2_CKpassive
30PA5/ADC1_IN5/CEC/DAC1_OUT2/I2S1_CK/SPI1_SCK/TIM12_CH2/TIM14_CH1/TIM2_CH1/TIM2_ETR/TSC_G2_IO2passive
31PA6/ADC1_IN6/COMP1_OUT/DAC2_OUT1/I2S1_MCK/SPI1_MISO/TIM13_CH1/TIM16_CH1/TIM3_CH1/TSC_G2_IO3passive
32PA7/ADC1_IN7/COMP2_OUT/I2S1_SD/SPI1_MOSI/TIM14_CH1/TIM17_CH1/TIM3_CH2/TSC_G2_IO4passive
33PC4/ADC1_IN14/TIM13_CH1/TSC_G3_IO1/USART1_TXpassive
34PC5/ADC1_IN15/TSC_G3_IO2/USART1_RXpassive
35PB0/ADC1_IN8/I2S1_SD/SDADC1_AIN6P/SPI1_MOSI/TIM3_CH2/TIM3_CH3/TSC_G3_IO3passive
36PB1/ADC1_IN9/SDADC1_AIN5P/SDADC1_AIN6M/TIM3_CH4/TSC_G3_IO4passive
37NPORpassive
38PE7/SDADC1_AIN3P/SDADC1_AIN4M/SDADC2_AIN5P/SDADC2_AIN6Mpassive
39PE8/SDADC1_AIN8P/SDADC2_AIN8Ppassive
40PE9/DAC1_EXTI9/DAC2_EXTI9/SDADC1_AIN7P/SDADC1_AIN8M/SDADC2_AIN7P/SDADC2_AIN8Mpassive
41PE10/SDADC1_AIN2Ppassive
42PE11/ADC1_EXTI11/SDADC1_AIN1P/SDADC1_AIN2M/SDADC1_EXTI11/SDADC2_AIN4P/SDADC2_EXTI11/SDADC3_EXTI11passive
43PE12/SDADC1_AIN0P/SDADC2_AIN3P/SDADC2_AIN4Mpassive
44PE13/SDADC1_AIN0M/SDADC2_AIN2Ppassive
45PE14/SDADC2_AIN1P/SDADC2_AIN2Mpassive
46PE15/ADC1_EXTI15/SDADC1_EXTI15/SDADC2_AIN0P/SDADC2_EXTI15/SDADC3_EXTI15/USART3_RXpassive
47PB10/CEC/I2S2_CK/SDADC2_AIN0M/SPI2_SCK/TIM2_CH3/TSC_SYNC/USART3_TXpassive
48VREFSD-passive
49VSSSDpassive
50VDDSD12passive
51VDDSD3passive
52VREFSD+passive
53PB14/I2S2_MCK/SDADC3_AIN8P/SPI2_MISO/TIM12_CH1/TIM15_CH1/TSC_G6_IO1/USART3_DE/USART3_RTSpassive
54PB15/ADC1/I2S2/RTC/SDADC1/SDADC2/SDADC3/SPI2/TIM12/TIM15/TSCpassive
55PD8/I2S2_CK/SDADC3_AIN6P/SPI2_SCK/TSC_G6_IO3/USART3_TXpassive
56PD9/DAC1_EXTI9/DAC2_EXTI9/SDADC3_AIN5P/SDADC3_AIN6M/TSC_G6_IO4/USART3_RXpassive
57PD10/SDADC3_AIN4P/USART3_CKpassive
58PD11/ADC1_EXTI11/SDADC1_EXTI11/SDADC2_EXTI11/SDADC3_AIN3P/SDADC3_AIN4M/SDADC3_EXTI11/USART3_CTSpassive
59PD12/SDADC3_AIN2P/TIM4_CH1/TSC_G8_IO1/USART3_DE/USART3_RTSpassive
60PD13/SDADC3_AIN1P/SDADC3_AIN2M/TIM4_CH2/TSC_G8_IO2passive
61PD14/SDADC3_AIN0P/TIM4_CH3/TSC_G8_IO3passive
62PD15/ADC1_EXTI15/SDADC1_EXTI15/SDADC2_EXTI15/SDADC3_AIN0M/SDADC3_EXTI15/TIM4_CH4/TSC_G8_IO4passive
63PC6/I2S1_WS/~{SPI1_NSS}/TIM3_CH1passive
64PC7/I2S1_CK/SPI1_SCK/TIM3_CH2passive
65PC8/I2S1_MCK/SPI1_MISO/TIM3_CH3passive
66PC9/DAC1_EXTI9/DAC2_EXTI9/I2S1_SD/SPI1_MOSI/TIM3_CH4passive
67PA8/I2C2_SMBA/I2S2_CK/RCC_MCO/SPI2_SCK/TIM4_ETR/TIM5_CH1/TIM5_ETR/USART1_CKpassive
68PA9/DAC1/DAC2/I2C2/I2S2/SPI2/TIM13/TIM15/TIM2/TSC/USART1passive
69PA10/I2C2_SDA/I2S2_SD/SPI2_MOSI/TIM14_CH1/~{TIM17_BKIN}/TIM2_CH4/TSC_G4_IO2/USART1_RXpassive
70PA11/ADC1/CAN/COMP1/I2S1/I2S2/SDADC1/SDADC2/SDADC3/SPI1/SPI2/TIM4/TIM5/USART1passive
71PA12/CAN_TX/COMP2_OUT/I2S1_CK/SPI1_SCK/TIM16_CH1/TIM4_CH2/TIM5_CH3/USART1_DE/USART1_RTSpassive
72PA13/I2S1_MCK/IR_OUT/SPI1_MISO/SYS_JTMS-SWDIO/TIM16_CH1N/TIM4_CH3/TIM5_CH4/TSC_G4_IO3/USART3_CTSpassive
73PF6/I2C2_SCL/I2S1_SD/SPI1_MOSI/TIM4_CH4/USART3_DE/USART3_RTSpassive
74VSSpassive
75VDDpassive
76PA14/I2C1_SDA/SYS_JTCK-SWCLK/TIM12_CH1/TSC_G4_IO4passive
77PA15/ADC1/I2C1/I2S1/I2S3/SDADC1/SDADC2/SDADC3/SPI1/SPI3/SYS/TIM12/TIM2/TSCpassive
78PC10/I2S3_CK/SPI3_SCK/TIM19_CH1/USART3_TXpassive
79PC11/ADC1_EXTI11/I2S3_MCK/SDADC1_EXTI11/SDADC2_EXTI11/SDADC3_EXTI11/SPI3_MISO/TIM19_CH2/USART3_RXpassive
80PC12/I2S3_SD/SPI3_MOSI/TIM19_CH3/USART3_CKpassive
81PD0/CAN_RX/TIM19_CH4passive
82PD1/CAN_TX/TIM19_ETRpassive
83PD2/TIM3_ETRpassive
84PD3/I2S2_MCK/SPI2_MISO/USART2_CTSpassive
85PD4/I2S2_SD/SPI2_MOSI/USART2_DE/USART2_RTSpassive
86PD5/USART2_TXpassive
87PD6/I2S2_WS/~{SPI2_NSS}/USART2_RXpassive
88PD7/I2S2_CK/SPI2_SCK/USART2_CKpassive
89PB3/I2S1/I2S3/SPI1/SPI3/SYS/TIM13/TIM2/TIM3/TIM4/TSC/USART2passive
90PB4/I2S1/I2S3/SPI1/SPI3/SYS/TIM15/TIM16/TIM17/TIM3/TSC/USART2passive
91PB5/I2C1_SMBA/I2S1_SD/I2S3_SD/SPI1_MOSI/SPI3_MOSI/~{TIM16_BKIN}/TIM17_CH1/TIM19_ETR/TIM3_CH2/USART2_CKpassive
92PB6/I2C1_SCL/TIM15_CH1/TIM16_CH1N/TIM19_CH1/TIM3_CH3/TIM4_CH1/TSC_G5_IO3/USART1_TXpassive
93PB7/I2C1_SDA/TIM15_CH2/TIM17_CH1N/TIM19_CH2/TIM3_CH4/TIM4_CH2/TSC_G5_IO4/USART1_RXpassive
94BOOT0passive
95PB8/CAN_RX/CEC/COMP1_OUT/I2C1_SCL/I2S2_CK/SPI2_SCK/TIM16_CH1/TIM19_CH3/TIM4_CH3/TSC_SYNC/USART3_TXpassive
96PB9/CAN/COMP2/DAC1/DAC2/I2C1/I2S2/IR/SPI2/TIM17/TIM19/TIM4/USART3passive
97PE0/TIM4_ETR/USART1_TXpassive
98PE1/USART1_RXpassive
99VSSpassive
100VDDpassive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed