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ST MICROELECTRONICS STM32F756IG_2

celestial-altium-MCU_STM32

Symbol

201 pins
Schematic symbol for ST MICROELECTRONICS STM32F756IG_2
Units
9
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
A1PE3/FMC_A19/~{SAI1_SD_B}/SYS_TRACED0passive
A2PE2/ETH_TXD3/FMC_A23/~{QUADSPI_BK1_IO2}/SAI1_MCLK_A/SPI4_SCK/SYS_TRACECLKpassive
A3PE1/DCMI_D3/~{FMC_NBL1}/LPTIM1_IN2/UART8_TXpassive
A4PE0/DCMI_D2/~{FMC_NBL0}/LPTIM1_ETR/SAI2_MCLK_A/TIM4_ETR/UART8_RXpassive
A5PB8/CAN1_RX/DCMI_D6/ETH_TXD3/I2C1_SCL/~{LTDC_B6}/SDMMC1_D4/TIM10_CH1/TIM4_CH3passive
A6PB5/CAN2/DCMI/ETH/FMC/I2C1/I2S1/I2S3/SPI1/SPI3/TIM3/USBpassive
A7PG14/ETH_TXD1/FMC_A25/LPTIM1_ETR/~{LTDC_B0}/~{QUADSPI_BK2_IO3}/SPI6_MOSI/SYS_TRACED1/USART6_TXpassive
A8PG13/ETH_TXD0/FMC_A24/LPTIM1_OUT/LTDC_R0/SPI6_SCK/SYS_TRACED0/USART6_CTSpassive
A9PB4/I2S2_WS/SPI1_MISO/~{SPI2_NSS}/SPI3_MISO/SYS_JTRST/TIM3_CH1passive
B1PE4/DCMI_D4/FMC_A20/~{LTDC_B0}/SAI1_FS_A/~{SPI4_NSS}/SYS_TRACED1passive
B2PE5/DCMI_D6/FMC_A21/LTDC_G0/SAI1_SCK_A/SPI4_MISO/SYS_TRACED2/TIM9_CH1passive
B3PE6/DCMI_D7/FMC_A22/LTDC_G1/SAI1_SD_A/~{SAI2_MCLK_B}/SPI4_MOSI/SYS_TRACED3/~{TIM1_BKIN2}/TIM9_CH2passive
B4PB9/CAN1_TX/DAC_EXTI9/DCMI_D7/I2C1_SDA/I2S2_WS/~{LTDC_B7}/SDMMC1_D5/~{SPI2_NSS}/TIM11_CH1/TIM4_CH4passive
B5PB7/DCMI_VSYNC/~{FMC_NL}/I2C1_SDA/TIM4_CH2/USART1_RXpassive
B6PB6/CAN2_TX/CEC/DCMI_D5/FMC_SDNE1/I2C1_SCL/~{QUADSPI_BK1_NCS}/TIM4_CH1/USART1_TXpassive
B7PG15/DCMI_D13/FMC_SDNCAS/USART6_CTSpassive
B8PG12/~{FMC_NE4}/LPTIM1_IN1/~{LTDC_B1}/~{LTDC_B4}/SPDIFRX_IN1/SPI6_MISO/USART6_DE/USART6_RTSpassive
B9PG11/ADC1_EXTI11/ADC2_EXTI11/ADC3_EXTI11/DCMI_D3/ETH_TX_EN/~{LTDC_B3}/SPDIFRX_IN0passive
C1VBATpassive
C2PI7/DCMI_D7/FMC_D29/~{LTDC_B7}/SAI2_FS_A/TIM8_CH3passive
C3PI6/DCMI_D6/FMC_D28/~{LTDC_B6}/SAI2_SD_A/TIM8_CH2passive
C4PI5/DCMI_VSYNC/~{FMC_NBL3}/~{LTDC_B5}/SAI2_SCK_A/TIM8_CH1passive
C5VDDpassive
C6PDR_ONpassive
C7VDDpassive
C8VDDpassive
C9VDDpassive
D1PC13/RTC_OUT/RTC_TAMP1/RTC_TS/SYS_WKUP4passive
D2PI8/RTC_TAMP2/RTC_TS/SYS_WKUP5passive
D3PI9/CAN1_RX/DAC_EXTI9/FMC_D30/LTDC_VSYNCpassive
D4PI4/DCMI_D5/~{FMC_NBL2}/~{LTDC_B4}/SAI2_MCLK_A/~{TIM8_BKIN}passive
D5VSSpassive
D6BOOT0passive
D7VSSpassive
D8VSSpassive
D9VSSpassive
E1PC14/RCC_OSC32_IN/OSC32_INpassive
E2PF0/FMC_A0/I2C2_SDApassive
E3PI10/ETH_RX_ER/FMC_D31/LTDC_HSYNCpassive
E4PI11/ADC1_EXTI11/ADC2_EXTI11/ADC3_EXTI11/SYS_WKUP6/USB_OTG_HS_ULPI_DIRpassive
F1PC15/RCC_OSC32_OUT/OSC32_OUTpassive
F2VSSpassive
F3VDDpassive
F4PH2/ETH_CRS/FMC_SDCKE0/LPTIM1_IN2/LTDC_R0/~{QUADSPI_BK2_IO0}/~{SAI2_SCK_B}passive
F6VSSpassive
F7VSSpassive
F8VSSpassive
F9VSSpassive
G1PH0/RCC_OSC_IN/OSC_INpassive
G2VSSpassive
G3VDDpassive
G4PH3/ETH_COL/FMC_SDNE0/LTDC_R1/~{QUADSPI_BK2_IO1}/~{SAI2_MCLK_B}passive
G6VSSpassive
G7VSSpassive
G8VSSpassive
G9VSSpassive
H1PH1/RCC_OSC_OUT/OSC_OUTpassive
H2PF2/FMC_A2/I2C2_SMBApassive
H3PF1/FMC_A1/I2C2_SCLpassive
H4PH4/I2C2_SCL/~{USB_OTG_HS_ULPI_NXT}passive
H6VSSpassive
H7VSSpassive
H8VSSpassive
H9VSSpassive
J1NRSTpassive
J2PF3/ADC3_IN9/FMC_A3passive
J3PF4/ADC3_IN14/FMC_A4passive
J4PH5/FMC_SDNWE/I2C2_SDA/~{SPI5_NSS}passive
J6VSSpassive
J7VSSpassive
J8VSSpassive
J9VSSpassive
K1PF7/ADC3_IN5/~{QUADSPI_BK1_IO2}/~{SAI1_MCLK_B}/SPI5_SCK/TIM11_CH1/UART7_TXpassive
K2PF6/ADC3_IN4/~{QUADSPI_BK1_IO3}/~{SAI1_SD_B}/~{SPI5_NSS}/TIM10_CH1/UART7_RXpassive
K3PF5/ADC3_IN15/FMC_A5passive
K4VDDpassive
K6VSSpassive
K7VSSpassive
K8VSSpassive
K9VSSpassive
L1PF10/ADC3_IN8/DCMI_D11/LTDC_DEpassive
L2PF9/ADC3_IN7/DAC_EXTI9/~{QUADSPI_BK1_IO1}/~{SAI1_FS_B}/SPI5_MOSI/TIM14_CH1/UART7_CTSpassive
L3PF8/ADC3_IN6/~{QUADSPI_BK1_IO0}/~{SAI1_SCK_B}/SPI5_MISO/TIM13_CH1/UART7_DE/UART7_RTSpassive
L4BYPASS_REGpassive
M1VSSApassive
M2PC0/ADC1_IN10/ADC2_IN10/ADC3_IN10/FMC_SDNWE/LTDC_R5/~{SAI2_FS_B}/USB_OTG_HS_ULPI_STPpassive
M3PC1/ADC1/ADC2/ADC3/ETH/I2S2/RTC/SAI1/SPI2/SYSpassive
M4PC2/ADC1_IN12/ADC2_IN12/ADC3_IN12/ETH_TXD2/FMC_SDNE0/SPI2_MISO/USB_OTG_HS_ULPI_DIRpassive
M5PC3/ADC1_IN13/ADC2_IN13/ADC3_IN13/ETH_TX_CLK/FMC_SDCKE0/I2S2_SD/SPI2_MOSI/~{USB_OTG_HS_ULPI_NXT}passive
M6PB2/I2S3_SD/QUADSPI_CLK/SAI1_SD_A/SPI3_MOSIpassive
M7PG1/FMC_A11passive
M8VSSpassive
M9VSSpassive
N1VREF-passive
N2PA1/ADC1/ADC2/ADC3/ETH/LTDC/QUADSPI/SAI2/TIM2/TIM5/UART4/USART2passive
N3PA0/WKUP/ADC1/ADC2/ADC3/ETH/SAI2/SYS/TIM2/TIM5/TIM8/UART4/USART2passive
N4PA4/ADC1/ADC2/DAC/DCMI/I2S1/I2S3/LTDC/SPI1/SPI3/USART2/USBpassive
N5PC4/ADC1_IN14/ADC2_IN14/ETH_RXD0/FMC_SDNE0/I2S1_MCK/SPDIFRX_IN2passive
N6PF13/FMC_A7/I2C4_SMBApassive
N7PG0/FMC_A10passive
N8VDDpassive
N9VDDpassive
P1VREF+passive
P2PA2/ADC1/ADC2/ADC3/ETH/LTDC/SAI2/SYS/TIM2/TIM5/TIM9/USART2passive
P3PA6/ADC1_IN6/ADC2_IN6/DCMI_PIXCLK/LTDC_G2/SPI1_MISO/TIM13_CH1/~{TIM1_BKIN}/TIM3_CH1/~{TIM8_BKIN}passive
P4PA5/ADC1/ADC2/DAC/I2S1/LTDC/SPI1/TIM2/TIM8/USBpassive
P5PC5/ADC1_IN15/ADC2_IN15/ETH_RXD1/FMC_SDCKE0/SPDIFRX_IN3passive
P6PF12/FMC_A6passive
P7PF15/FMC_A9/I2C4_SDApassive
P8PE8/FMC_D5/FMC_DA5/~{QUADSPI_BK2_IO1}/TIM1_CH1N/UART7_TXpassive
P9PE9/DAC_EXTI9/FMC_D6/FMC_DA6/~{QUADSPI_BK2_IO2}/TIM1_CH1/UART7_DE/UART7_RTSpassive
R1VDDApassive
R2PA3/ADC1/ADC2/ADC3/ETH/LTDC/TIM2/TIM5/TIM9/USART2/USBpassive
R3PA7/ADC1/ADC2/ETH/FMC/I2S1/SPI1/TIM14/TIM1/TIM3/TIM8passive
R4PB1/ADC1_IN9/ADC2_IN9/ETH_RXD3/LTDC_R6/TIM1_CH3N/TIM3_CH4/TIM8_CH3N/USB_OTG_HS_ULPI_D2passive
R5PB0/ADC1_IN8/ADC2_IN8/ETH_RXD2/LTDC_R3/TIM1_CH2N/TIM3_CH3/TIM8_CH2N/UART4_CTS/USB_OTG_HS_ULPI_D1passive
R6PF11/ADC1_EXTI11/ADC2_EXTI11/ADC3_EXTI11/DCMI_D12/FMC_SDNRAS/~{SAI2_SD_B}/SPI5_MOSIpassive
R7PF14/FMC_A8/I2C4_SCLpassive
R8PE7/FMC_D4/FMC_DA4/~{QUADSPI_BK2_IO0}/TIM1_ETR/UART7_RXpassive
R9PE10/FMC_D7/FMC_DA7/~{QUADSPI_BK2_IO3}/TIM1_CH2N/UART7_CTSpassive
A10PB3/I2S1_CK/I2S3_CK/SPI1_SCK/SPI3_SCK/SYS_JTDO-SWO/TIM2_CH2passive
A11PD7/~{FMC_NE1}/SPDIFRX_IN0/USART2_CKpassive
A12PC12/DCMI_D9/I2S3_SD/SDMMC1_CK/SPI3_MOSI/SYS_TRACED3/UART5_TX/USART3_CKpassive
A13PA15/CEC/I2S1_WS/I2S3_WS/~{SPI1_NSS}/~{SPI3_NSS}/SYS_JTDI/TIM2_CH1/TIM2_ETR/UART4_DE/UART4_RTSpassive
A14PA14/SYS_JTCK-SWCLKpassive
A15PA13/SYS_JTMS-SWDIOpassive
B10PG10/DCMI_D2/~{FMC_NE3}/~{LTDC_B2}/LTDC_G3/~{SAI2_SD_B}passive
B11PD6/DCMI_D10/~{FMC_NWAIT}/I2S3_SD/~{LTDC_B2}/SAI1_SD_A/SPI3_MOSI/USART2_RXpassive
B12PD0/CAN1_RX/FMC_D2/FMC_DA2passive
B13PC11/ADC1/ADC2/ADC3/DCMI/QUADSPI/SDMMC1/SPI3/UART4/USART3passive
B14PC10/DCMI_D8/I2S3_CK/LTDC_R2/~{QUADSPI_BK1_IO1}/SDMMC1_D2/SPI3_SCK/UART4_TX/USART3_TXpassive
B15PA12/CAN1_TX/LTDC_R5/~{SAI2_FS_B}/TIM1_ETR/USART1_DE/USART1_RTS/USB_OTG_FS_DPpassive
C10PG9/DAC_EXTI9/DCMI_VSYNC/~{FMC_NCE}/~{FMC_NE2}/~{QUADSPI_BK2_IO2}/~{SAI2_FS_B}/SPDIFRX_IN3/USART6_RXpassive
C11PD5/~{FMC_NWE}/USART2_TXpassive
C12PD1/CAN1_TX/FMC_D3/FMC_DA3passive
C13PI3/DCMI_D10/FMC_D27/I2S2_SD/SPI2_MOSI/TIM8_ETRpassive
C14PI2/DCMI_D9/FMC_D26/LTDC_G7/SPI2_MISO/TIM8_CH4passive
C15PA11/ADC1_EXTI11/ADC2_EXTI11/ADC3_EXTI11/CAN1_RX/LTDC_R4/TIM1_CH4/USART1_CTS/USB_OTG_FS_DMpassive
D10PD4/~{FMC_NOE}/USART2_DE/USART2_RTSpassive
D11PD3/DCMI_D5/FMC_CLK/I2S2_CK/LTDC_G7/SPI2_SCK/USART2_CTSpassive
D12PD2/DCMI_D11/SDMMC1_CMD/SYS_TRACED2/TIM3_ETR/UART5_RXpassive
D13PH15/DCMI_D11/FMC_D23/LTDC_G4/TIM8_CH3Npassive
D14PI1/DCMI_D8/FMC_D25/I2S2_CK/LTDC_G6/SPI2_SCK/~{TIM8_BKIN2}passive
D15PA10/DCMI_D1/TIM1_CH3/USART1_RX/USB_OTG_FS_IDpassive
E12PH13/CAN1_TX/FMC_D21/LTDC_G2/TIM8_CH1Npassive
E13PH14/DCMI_D4/FMC_D22/LTDC_G3/TIM8_CH2Npassive
E14PI0/DCMI_D13/FMC_D24/I2S2_WS/LTDC_G5/~{SPI2_NSS}/TIM5_CH4passive
E15PA9/DAC_EXTI9/DCMI_D0/I2C3_SMBA/I2S2_CK/SPI2_SCK/TIM1_CH2/USART1_TX/USB_OTG_FS_VBUSpassive
F10VSSpassive
F12VSSpassive
F13VCAP_2passive
F14PC9/DAC/DCMI/I2C3/I2S/QUADSPI/RCC/SDMMC1/TIM3/TIM8/UART5passive
F15PA8/I2C3_SCL/LTDC_R6/RCC_MCO_1/TIM1_CH1/~{TIM8_BKIN2}/USART1_CK/USB_OTG_FS_SOFpassive
G10VSSpassive
G12VSSpassive
G13VDDpassive
G14PC8/DCMI_D2/SDMMC1_D0/SYS_TRACED1/TIM3_CH3/TIM8_CH3/UART5_DE/UART5_RTS/USART6_CKpassive
G15PC7/DCMI_D1/I2S3_MCK/LTDC_G6/SDMMC1_D7/TIM3_CH2/TIM8_CH2/USART6_RXpassive
H10VSSpassive
H12VSSpassive
H13VDDUSBpassive
H14PG8/ETH_PPS_OUT/FMC_SDCLK/SPDIFRX_IN2/~{SPI6_NSS}/USART6_DE/USART6_RTSpassive
H15PC6/DCMI_D0/I2S2_MCK/LTDC_HSYNC/SDMMC1_D6/TIM3_CH1/TIM8_CH1/USART6_TXpassive
J10VSSpassive
J12VDDpassive
J13VDDpassive
J14PG7/DCMI_D13/FMC_INT/LTDC_CLK/USART6_CKpassive
J15PG6/DCMI_D12/LTDC_R7passive
K10VSSpassive
K12PH12/DCMI_D3/FMC_D20/I2C4_SDA/LTDC_R6/TIM5_CH3passive
K13PG5/FMC_A15/~{FMC_BA1}passive
K14PG4/FMC_A14/~{FMC_BA0}passive
K15PG3/FMC_A13passive
L12PH11/ADC1_EXTI11/ADC2_EXTI11/ADC3_EXTI11/DCMI_D2/FMC_D19/I2C4_SCL/LTDC_R5/TIM5_CH2passive
L13PH10/DCMI_D1/FMC_D18/I2C4_SMBA/LTDC_R4/TIM5_CH1passive
L14PD15/FMC_D1/FMC_DA1/TIM4_CH4/UART8_DE/UART8_RTSpassive
L15PG2/FMC_A12passive
M10VCAP_1passive
M11PH6/DCMI_D8/ETH_RXD2/FMC_SDNE1/I2C2_SMBA/SPI5_SCK/TIM12_CH1passive
M12PH8/DCMI_HSYNC/FMC_D16/I2C3_SDA/LTDC_R2passive
M13PH9/DAC_EXTI9/DCMI_D0/FMC_D17/I2C3_SMBA/LTDC_R3/TIM12_CH2passive
M14PD14/FMC_D0/FMC_DA0/TIM4_CH3/UART8_CTSpassive
M15PD13/FMC_A18/I2C4_SDA/LPTIM1_OUT/~{QUADSPI_BK1_IO3}/SAI2_SCK_A/TIM4_CH2passive
N10VDDpassive
N11PE13/FMC_D10/FMC_DA10/LTDC_DE/~{SAI2_FS_B}/SPI4_MISO/TIM1_CH3passive
N12PH7/DCMI_D9/ETH_RXD3/FMC_SDCKE1/I2C3_SCL/SPI5_MISOpassive
N13PD12/FMC_A17/FMC_ALE/I2C4_SCL/LPTIM1_IN1/~{QUADSPI_BK1_IO1}/SAI2_FS_A/TIM4_CH1/USART3_DE/USART3_RTSpassive
N14PD11/ADC1/ADC2/ADC3/FMC/I2C4/QUADSPI/SAI2/USART3passive
N15PD10/FMC_D15/FMC_DA15/~{LTDC_B3}/USART3_CKpassive
P10PE11/ADC1_EXTI11/ADC2_EXTI11/ADC3_EXTI11/FMC_D8/FMC_DA8/LTDC_G3/~{SAI2_SD_B}/~{SPI4_NSS}/TIM1_CH2passive
P11PE14/FMC_D11/FMC_DA11/LTDC_CLK/~{SAI2_MCLK_B}/SPI4_MOSI/TIM1_CH4passive
P12PB12/CAN2/ETH/I2C2/I2S2/SPI2/TIM1/USART3/USBpassive
P13PB13/CAN2_TX/ETH_TXD1/I2S2_CK/SPI2_SCK/TIM1_CH1N/USART3_CTS/USB_OTG_HS_ULPI_D6/USB_OTG_HS_VBUSpassive
P14PD9/DAC_EXTI9/FMC_D14/FMC_DA14/USART3_RXpassive
P15PD8/FMC_D13/FMC_DA13/SPDIFRX_IN1/USART3_TXpassive
R10PE12/FMC_D9/FMC_DA9/~{LTDC_B4}/~{SAI2_SCK_B}/SPI4_SCK/TIM1_CH3Npassive
R11PE15/FMC_D12/FMC_DA12/LTDC_R7/~{TIM1_BKIN}passive
R12PB10/ETH_RX_ER/I2C2_SCL/I2S2_CK/LTDC_G4/SPI2_SCK/TIM2_CH3/USART3_TX/USB_OTG_HS_ULPI_D3passive
R13PB11/ADC1/ADC2/ADC3/ETH/I2C2/LTDC/TIM2/USART3/USBpassive
R14PB14/SPI2_MISO/TIM12_CH1/TIM1_CH2N/TIM8_CH2N/USART3_DE/USART3_RTS/USB_OTG_HS_DMpassive
R15PB15/I2S2_SD/RTC_REFIN/SPI2_MOSI/TIM12_CH2/TIM1_CH3N/TIM8_CH3N/USB_OTG_HS_DPpassive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed