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ST MICROELECTRONICS STM32G471V(_3

celestial-altium-MCU_STM32

Symbol

100 pins
Schematic symbol for ST MICROELECTRONICS STM32G471V(_3
Units
5
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
A1PE2/ADC3_EXTI2/SAI1_CK1/SAI1_MCLK_A/SPI4_SCK/SYS_TRACECLK/TIM20_CH1/TIM3_CH1passive
A2PB9/COMP2/DAC1/DAC3/FDCAN1/I2C1/IR/SAI1/TIM17/TIM1/TIM4/TIM8/USART3passive
A3PB7/COMP3/I2C1/I2C4/LPTIM1/SYS/TIM17/TIM3/TIM4/TIM8/UART4/USART1passive
A4PB5/FDCAN2/I2C1/I2C3/I2S3/LPTIM1/SAI1/SPI1/SPI3/TIM16/TIM17/TIM3/TIM8/UART5/USART2passive
A5PB4/SAI1/SPI1/SPI3/SYS/TIM16/TIM17/TIM3/TIM8/UART5/UCPD1/USART2passive
A6PD7/~{QUADSPI1_BK2_IO3}/TIM2_CH3/USART2_CKpassive
A7PD6/~{QUADSPI1_BK2_IO2}/SAI1_D1/SAI1_SD_A/TIM2_CH4/USART2_RXpassive
A8PD4/~{QUADSPI1_BK2_IO0}/TIM2_CH2/USART2_DE/USART2_RTSpassive
A9PD3/ADC3_EXTI3/~{QUADSPI1_BK2_NCS}/TIM2_CH1/TIM2_ETR/USART2_CTS/~{USART2_NSS}passive
B1PE4/SAI1_D2/SAI1_FS_A/~{SPI4_NSS}/SYS_TRACED1/TIM20_CH1N/TIM3_CH3passive
B2PE3/ADC3_EXTI3/~{SAI1_SD_B}/~{SPI4_NSS}/SYS_TRACED0/TIM20_CH2/TIM3_CH2passive
B3PE1/TIM17_CH1/TIM20_CH4/USART1_RXpassive
B4PB8-BOOT0/COMP1/FDCAN1/I2C1/SAI1/TIM16/TIM1/TIM4/TIM8/USART3passive
B5PB6/COMP4/FDCAN2/LPTIM1/SAI1/TIM16/TIM4/TIM8/UCPD1/USART1passive
B6PB3/ADC3/CRS/I2S3/SAI1/SPI1/SPI3/SYS/TIM2/TIM3/TIM4/TIM8/USART2passive
B7PD5/~{QUADSPI1_BK2_IO1}/USART2_TXpassive
B8PD2/ADC3_EXTI2/TIM3_ETR/~{TIM8_BKIN}/UART5_RXpassive
B9PD0/FDCAN1_RX/TIM8_CH4Npassive
C1PE6/RTC_TAMP3/SAI1_D1/SAI1_SD_A/SPI4_MOSI/SYS_TRACED3/SYS_WKUP3/TIM20_CH3Npassive
C2PE5/SAI1_CK2/SAI1_SCK_A/SPI4_MISO/SYS_TRACED2/TIM20_CH2N/TIM3_CH4passive
C3PE0/TIM16_CH1/TIM20_CH4N/TIM20_ETR/TIM4_ETR/USART1_TXpassive
C4VDDpassive
C5VSSpassive
C8VDDpassive
C9VSSpassive
D1PC14-OSC32_IN/RCC_OSC32_INpassive
D2VBATpassive
D3PC13/RTC_OUT1/RTC_TAMP1/RTC_TS/SYS_WKUP2/~{TIM1_BKIN}/TIM1_CH1N/TIM8_CH4Npassive
E1PC15-OSC32_OUT/ADC1_EXTI15/ADC2_EXTI15/RCC_OSC32_OUTpassive
E2PF9/DAC1_EXTI9/DAC3_EXTI9/~{QUADSPI1_BK1_IO1}/~{SAI1_FS_B}/SPI2_SCK/TIM15_CH1/~{TIM20_BKIN}passive
E3PC0/ADC1_IN6/ADC2_IN6/COMP3_INM/LPTIM1_IN1/LPUART1_RX/TIM1_CH1passive
F1PF0-OSC_IN/ADC1_IN10/I2C2_SDA/I2S2_WS/RCC_OSC_IN/~{SPI2_NSS}/TIM1_CH3Npassive
F2PF10/DAC1_EXTI10/DAC3_EXTI10/QUADSPI1_CLK/SAI1_D3/SPI2_SCK/TIM15_CH2/~{TIM20_BKIN2}passive
G1PF1-OSC_OUT/ADC2_IN10/COMP3_INM/I2S2_CK/RCC_OSC_OUT/SPI2_SCKpassive
G2PG10-NRST/DAC1_EXTI10/DAC3_EXTI10/RCC_MCOpassive
H1PC2/ADC1_IN8/ADC2_IN8/ADC3_EXTI2/COMP3_OUT/LPTIM1_IN2/~{QUADSPI1_BK2_IO1}/TIM1_CH3/TIM20_CH2passive
H2PC1/ADC1_IN7/ADC2_IN7/COMP3_INP/LPTIM1_OUT/LPUART1_TX/~{QUADSPI1_BK2_IO0}/SAI1_SD_A/TIM1_CH2passive
H3VSSpassive
J1PC3/ADC1_IN9/ADC2_IN9/ADC3_EXTI3/LPTIM1_ETR/~{QUADSPI1_BK2_IO2}/SAI1_D1/SAI1_SD_A/~{TIM1_BKIN2}/TIM1_CH4passive
J2PF2/ADC3_EXTI2/I2C2_SMBA/TIM20_CH3passive
J3VDDpassive
K1PA0/ADC1/ADC2/COMP1/COMP3/RTC/SYS/TIM2/TIM8/USART2passive
K2PA1/ADC1/ADC2/COMP1/OPAMP1/OPAMP3/RTC/TIM15/TIM2/USART2passive
K3PA2/ADC1/ADC3/COMP2/LPUART1/OPAMP1/QUADSPI1/RCC/SYS/TIM15/TIM2/UCPD1/USART2passive
K4PC5/ADC2/OPAMP1/OPAMP2/SAI1/SYS/TIM15/TIM1/USART1passive
K5PB2/ADC2/ADC3/COMP4/I2C3/LPTIM1/OPAMP3/QUADSPI1/RTC/TIM20passive
K8PE8/ADC3_IN6/COMP4_INM/~{SAI1_SCK_B}/TIM1_CH1Npassive
K9PE11/ADC1_EXTI11/ADC2_EXTI11/ADC3_IN15/~{QUADSPI1_BK1_NCS}/~{SPI4_NSS}/TIM1_CH2passive
L1PA3/ADC1/ADC3/COMP2/LPUART1/OPAMP1/QUADSPI1/SAI1/TIM15/TIM2/USART2passive
L2PA4/ADC2_IN17/COMP1_INM/DAC1_OUT1/I2S3_WS/~{SAI1_FS_B}/~{SPI1_NSS}/~{SPI3_NSS}/TIM3_CH2/USART2_CKpassive
L3PC4/ADC2_IN5/I2C2_SCL/~{QUADSPI1_BK2_IO3}/TIM1_ETR/USART1_TXpassive
L4PB0/ADC1/ADC3/COMP4/OPAMP2/OPAMP3/QUADSPI1/TIM1/TIM3/TIM8/UCPD1passive
L5VSSApassive
L6VSSpassive
L7VDDpassive
L8PE10/ADC3_IN14/DAC1_EXTI10/DAC3_EXTI10/QUADSPI1_CLK/~{SAI1_MCLK_B}/TIM1_CH2Npassive
L9PE13/ADC3_IN3/~{QUADSPI1_BK1_IO1}/SPI4_MISO/TIM1_CH3passive
M1PA5/ADC2/COMP2/DAC1/OPAMP2/SPI1/TIM2/UCPD1passive
M2PA6/ADC2/COMP1/LPUART1/OPAMP2/QUADSPI1/SPI1/TIM16/TIM1/TIM3/TIM8passive
M3PA7/ADC2/COMP2/OPAMP1/OPAMP2/QUADSPI1/SPI1/TIM17/TIM1/TIM3/TIM8/UCPD1passive
M4PB1/ADC1/ADC3/COMP1/COMP4/LPUART1/OPAMP3/QUADSPI1/TIM1/TIM3/TIM8passive
M5VREF+/VREFBUF_OUTpassive
M6VDDApassive
M7PE7/ADC3_IN4/COMP4_INP/~{SAI1_SD_B}/TIM1_ETRpassive
M8PE9/ADC3_IN2/DAC1_EXTI9/DAC3_EXTI9/~{SAI1_FS_B}/TIM1_CH1passive
M9PE12/ADC3_IN16/~{QUADSPI1_BK1_IO0}/SPI4_SCK/TIM1_CH3Npassive
A10PD1/FDCAN1_TX/~{TIM8_BKIN2}/TIM8_CH4passive
A11PC12/I2S3_SD/SPI3_MOSI/TIM8_CH3N/UART5_TX/UCPD1_FRSTX1/UCPD1_FRSTX2/USART3_CKpassive
A12PC10/DAC1_EXTI10/DAC3_EXTI10/I2S3_CK/SPI3_SCK/TIM8_CH1N/UART4_TX/USART3_TXpassive
B10PC11/ADC1_EXTI11/ADC2_EXTI11/I2C3_SDA/SPI3_MISO/TIM8_CH2N/UART4_RX/USART3_RXpassive
B11PA15/ADC1/ADC2/I2C1/I2S3/SPI1/SPI3/SYS/TIM1/TIM2/TIM8/UART4/USART2passive
B12PA14/I2C1_SDA/I2C4_SMBA/LPTIM1_OUT/~{SAI1_FS_B}/SYS_JTCK-SWCLK/~{TIM1_BKIN}/TIM8_CH2/USART2_TXpassive
C10PA13/I2C1_SCL/I2C4_SCL/IR_OUT/~{SAI1_SD_B}/SYS_JTMS-SWDIO/TIM16_CH1N/TIM4_CH3/USART3_CTS/~{USART3_NSS}passive
C11PA10/CRS/DAC1/DAC3/I2C2/SAI1/SPI2/TIM17/TIM1/TIM2/TIM8/UCPD1/USART1passive
C12PA12/COMP2_OUT/FDCAN1_TX/I2S_CKIN/TIM16_CH1/TIM1_CH2N/TIM1_ETR/TIM4_CH2/USART1_DE/USART1_RTS/USB_DPpassive
D10PC8/I2C3_SCL/TIM20_CH3/TIM3_CH3/TIM8_CH3passive
D11PA9/DAC1/DAC3/I2C2/I2C3/I2S3/SAI1/TIM15/TIM1/TIM2/UCPD1/USART1passive
D12PA11/ADC1/ADC2/COMP1/FDCAN1/I2S2/SPI2/TIM1/TIM4/USART1/USBpassive
E10PC6/I2C4_SCL/I2S2_MCK/TIM3_CH1/TIM8_CH1passive
E11PC9/DAC1_EXTI9/DAC3_EXTI9/I2C3_SDA/I2S_CKIN/TIM3_CH4/~{TIM8_BKIN2}/TIM8_CH4passive
E12PA8/I2C2_SDA/I2C3_SCL/I2S2_MCK/RCC_MCO/SAI1_CK2/SAI1_SCK_A/TIM1_CH1/TIM4_ETR/USART1_CKpassive
F11PC7/I2C4_SDA/I2S3_MCK/TIM3_CH2/TIM8_CH2passive
F12PD14/ADC3_IN11/OPAMP2_VINP/OPAMP2_VINP_SEC/TIM4_CH3passive
G11PD15/ADC1_EXTI15/ADC2_EXTI15/~{SPI2_NSS}/TIM4_CH4passive
G12PD13/ADC3_IN10/TIM4_CH2passive
H10VDDpassive
H11PD11/ADC1_EXTI11/ADC2_EXTI11/ADC3_IN8/I2C4_SMBA/USART3_CTS/~{USART3_NSS}passive
H12PD12/ADC3_IN9/TIM4_CH1/USART3_DE/USART3_RTSpassive
J10VSSpassive
J11PD9/DAC1_EXTI9/DAC3_EXTI9/USART3_RXpassive
J12PD10/ADC3_IN7/DAC1_EXTI10/DAC3_EXTI10/USART3_CKpassive
K10PB11/ADC1_EXTI11/ADC1_IN14/ADC2_EXTI11/ADC2_IN14/LPUART1_TX/~{QUADSPI1_BK1_NCS}/TIM2_CH4/USART3_RXpassive
K11PB13/ADC3/FDCAN2/I2S2/LPUART1/OPAMP3/SPI2/TIM1/USART3passive
K12PD8/USART3_TXpassive
L10PB10/DAC1/DAC3/LPUART1/OPAMP3/QUADSPI1/SAI1/TIM1/TIM2/USART3passive
L11PB12/ADC1_IN11/FDCAN2_RX/I2C2_SMBA/I2S2_WS/LPUART1_DE/LPUART1_RTS/~{SPI2_NSS}/~{TIM1_BKIN}/USART3_CKpassive
L12PB15/ADC1/ADC2/COMP3/I2S2/RTC/SPI2/TIM15/TIM1passive
M10PE14/~{QUADSPI1_BK1_IO2}/SPI4_MOSI/~{TIM1_BKIN2}/TIM1_CH4passive
M11PE15/ADC1_EXTI15/ADC2_EXTI15/~{QUADSPI1_BK1_IO3}/~{TIM1_BKIN}/TIM1_CH4N/USART3_RXpassive
M12PB14/ADC1/COMP4/OPAMP2/SPI2/TIM15/TIM1/USART3passive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed