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ST MICROELECTRONICS STM32G491RE

celestial-altium-MCU_STM32

Symbol

64 pins
Schematic symbol for ST MICROELECTRONICS STM32G491RE
Units
3
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
A1VDDpassive
A2PC11/ADC1_EXTI11/ADC2_EXTI11/I2C3_SDA/SPI3_MISO/TIM8_CH2N/UART4_RX/USART3_RXpassive
A3PC12/I2S3_SD/SPI3_MOSI/TIM8_CH3N/UART5_TX/UCPD1_FRSTX1/UCPD1_FRSTX2/USART3_CKpassive
A4PD2/ADC3_EXTI2/TIM3_ETR/~{TIM8_BKIN}/UART5_RXpassive
A5PB5/FDCAN2/I2C1/I2C3/I2S3/LPTIM1/SAI1/SPI1/SPI3/TIM16/TIM17/TIM3/TIM8/UART5/USART2passive
A6PB7/COMP3/I2C1/LPTIM1/SYS/TIM17/TIM3/TIM4/TIM8/UART4/USART1passive
A7PB9/COMP2/DAC1/DAC3/FDCAN1/I2C1/IR/SAI1/TIM17/TIM1/TIM4/TIM8/USART3passive
A8VDDpassive
B1PA12/COMP2_OUT/FDCAN1_TX/I2S_CKIN/TIM16_CH1/TIM1_CH2N/TIM1_ETR/TIM4_CH2/USART1_DE/USART1_RTS/USB_DPpassive
B2VSSpassive
B3PC10/DAC1_EXTI10/DAC3_EXTI10/I2S3_CK/SPI3_SCK/TIM8_CH1N/UART4_TX/USART3_TXpassive
B4PA15/ADC1/ADC2/I2C1/I2S3/SPI1/SPI3/SYS/TIM1/TIM20/TIM2/TIM8/UART4/USART2passive
B5PB6/COMP4/FDCAN2/LPTIM1/SAI1/TIM16/TIM4/TIM8/UCPD1/USART1passive
B6PB8-BOOT0/COMP1/FDCAN1/I2C1/SAI1/TIM16/TIM1/TIM4/TIM8/USART3passive
B7VSSpassive
B8VBATpassive
C1PA11/ADC1/ADC2/COMP1/FDCAN1/I2S2/SPI2/TIM1/TIM4/USART1/USBpassive
C2PA10/CRS/DAC1/DAC3/I2C2/SAI1/SPI2/TIM17/TIM1/TIM2/TIM8/UCPD1/USART1passive
C3PA13/I2C1_SCL/IR_OUT/~{SAI1_SD_B}/SYS_JTMS-SWDIO/TIM16_CH1N/TIM4_CH3/USART3_CTS/~{USART3_NSS}passive
C4PA14/I2C1_SDA/LPTIM1_OUT/~{SAI1_FS_B}/SYS_JTCK-SWCLK/~{TIM1_BKIN}/TIM8_CH2/USART2_TXpassive
C5PB4/SAI1/SPI1/SPI3/SYS/TIM16/TIM17/TIM3/TIM8/UART5/UCPD1/USART2passive
C6PC13/RTC_OUT1/RTC_TAMP1/RTC_TS/SYS_WKUP2/~{TIM1_BKIN}/TIM1_CH1N/TIM8_CH4Npassive
C7PC1/ADC1_IN7/ADC2_IN7/COMP3_INP/LPTIM1_OUT/LPUART1_TX/~{QUADSPI1_BK2_IO0}/SAI1_SD_A/TIM1_CH2passive
C8PC14-OSC32_IN/RCC_OSC32_INpassive
D1PA9/DAC1/DAC3/I2C2/I2C3/I2S3/SAI1/TIM15/TIM1/TIM2/UCPD1/USART1passive
D2PA8/I2C2_SDA/I2C3_SCL/I2S2_MCK/RCC_MCO/SAI1_CK2/SAI1_SCK_A/TIM1_CH1/TIM4_ETR/USART1_CKpassive
D3PC9/DAC1_EXTI9/DAC3_EXTI9/I2C3_SDA/I2S_CKIN/TIM3_CH4/~{TIM8_BKIN2}/TIM8_CH4passive
D4PB3/ADC3/CRS/I2S3/SAI1/SPI1/SPI3/SYS/TIM2/TIM3/TIM4/TIM8/USART2passive
D5PA2/ADC1/ADC3/COMP2/LPUART1/OPAMP1/QUADSPI1/RCC/SYS/TIM15/TIM2/UCPD1/USART2passive
D6PC2/ADC1_IN8/ADC2_IN8/ADC3_EXTI2/COMP3_OUT/LPTIM1_IN2/~{QUADSPI1_BK2_IO1}/TIM1_CH3/TIM20_CH2passive
D7PG10-NRST/DAC1_EXTI10/DAC3_EXTI10/RCC_MCOpassive
D8PC15-OSC32_OUT/ADC1_EXTI15/ADC2_EXTI15/RCC_OSC32_OUTpassive
E1PC7/I2S3_MCK/TIM3_CH2/TIM8_CH2passive
E2PC8/I2C3_SCL/TIM20_CH3/TIM3_CH3/TIM8_CH3passive
E3PC6/I2S2_MCK/TIM3_CH1/TIM8_CH1passive
E4PA5/ADC2/COMP2/DAC1/OPAMP2/SPI1/TIM2/UCPD1passive
E5PA4/ADC2_IN17/COMP1_INM/DAC1_OUT1/I2S3_WS/~{SAI1_FS_B}/~{SPI1_NSS}/~{SPI3_NSS}/TIM3_CH2/USART2_CKpassive
E6PC3/ADC1_IN9/ADC2_IN9/ADC3_EXTI3/LPTIM1_ETR/~{QUADSPI1_BK2_IO2}/SAI1_D1/SAI1_SD_A/~{TIM1_BKIN2}/TIM1_CH4passive
E7PF1-OSC_OUT/ADC2_IN10/COMP3_INM/I2S2_CK/RCC_OSC_OUT/SPI2_SCKpassive
E8PF0-OSC_IN/ADC1_IN10/I2C2_SDA/I2S2_WS/RCC_OSC_IN/~{SPI2_NSS}/TIM1_CH3Npassive
F1PB15/ADC1/ADC2/COMP3/I2S2/RTC/SPI2/TIM15/TIM1passive
F2PB14/ADC1/COMP4/OPAMP2/SPI2/TIM15/TIM1/USART3passive
F3PB0/ADC1/ADC3/COMP4/OPAMP2/OPAMP3/QUADSPI1/TIM1/TIM3/TIM8/UCPD1passive
F4PC5/ADC2/OPAMP1/OPAMP2/SAI1/SYS/TIM15/TIM1/USART1passive
F5PA7/ADC2/COMP2/OPAMP1/OPAMP2/QUADSPI1/SPI1/TIM17/TIM1/TIM3/TIM8/UCPD1passive
F6PA3/ADC1/ADC3/COMP2/LPUART1/OPAMP1/QUADSPI1/SAI1/TIM15/TIM2/USART2passive
F7PA1/ADC1/ADC2/COMP1/OPAMP1/OPAMP3/OPAMP6/RTC/TIM15/TIM2/USART2passive
F8PC0/ADC1_IN6/ADC2_IN6/COMP3_INM/LPTIM1_IN1/LPUART1_RX/TIM1_CH1passive
G1PB13/ADC3/FDCAN2/I2S2/LPUART1/OPAMP3/OPAMP6/SPI2/TIM1/USART3passive
G2VSSpassive
G3PB12/ADC1/FDCAN2/I2C2/I2S2/LPUART1/OPAMP6/SPI2/TIM1/USART3passive
G4PB2/ADC2/ADC3/COMP4/I2C3/LPTIM1/OPAMP3/QUADSPI1/RTC/TIM20passive
G5VSSApassive
G6PC4/ADC2_IN5/I2C2_SCL/~{QUADSPI1_BK2_IO3}/TIM1_ETR/USART1_TXpassive
G7VSSpassive
G8PA0/ADC1/ADC2/COMP1/COMP3/RTC/SYS/TIM2/TIM8/USART2passive
H1VDDpassive
H2PB10/DAC1/DAC3/LPUART1/OPAMP3/QUADSPI1/SAI1/TIM1/TIM2/USART3passive
H3PB11/ADC1/ADC2/LPUART1/OPAMP6/QUADSPI1/TIM2/USART3passive
H4VDDApassive
H5VREF+/VREFBUF_OUTpassive
H6PB1/ADC1/ADC3/COMP1/COMP4/LPUART1/OPAMP3/OPAMP6/QUADSPI1/TIM1/TIM3/TIM8passive
H7PA6/ADC2/COMP1/LPUART1/OPAMP2/QUADSPI1/SPI1/TIM16/TIM1/TIM3/TIM8passive
H8VDDpassive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed