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ST MICROELECTRONICS STM32H563AI_2

celestial-altium-MCU_STM32

Symbol

169 pins
Schematic symbol for ST MICROELECTRONICS STM32H563AI_2
Units
8
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
A1PI7/DCMI_D7/PSSI_D7/SAI2_FS_A/TIM8_CH3passive
A2PI6/DCMI_D6/PSSI_D6/SAI2_SD_A/TIM8_CH2passive
A3VDDpassive
A4VCAPpassive
A5PB4(NJTRST)/DCMI/DEBUG/I2S1/I2S2/I2S3/LPTIM1/OCTOSPI1/PSSI/SDMMC2/SPI1/SPI2/SPI3/SPI6/TIM16/TIM3passive
A6VDDIO2passive
A7PD5/FDCAN1_TX/~{FMC_NWE}/OCTOSPI1_IO5/SPI2_RDY/TIM1_CH4N/USART2_TXpassive
A8VDDpassive
A9PC11/ADC1/ADC2/DCMI/I2S3/LPTIM3/OCTOSPI1/PSSI/SDMMC1/SPI3/UART4/USART3passive
B1VDDpassive
B2VSSpassive
B3PI5/DCMI_VSYNC/PSSI_RDY/SAI2_SCK_A/TIM8_CH1passive
B4VSSpassive
B5BOOT0passive
B6PG15/ADC1_EXTI15/ADC2_EXTI15/DCMI_D13/FMC_SDNCAS/PSSI_D13/SPI4_RDY/USART10_CK/USART6_CTS/~{USART6_NSS}passive
B7PD7/~{FMC_NCE}/~{FMC_NE1}/I2S1_SDO/LPTIM4_OUT/OCTOSPI1_IO7/SDMMC2_CMD/SPI1_MOSI/USART2_CKpassive
B8VSSpassive
B9PD1/FDCAN1_TX/FMC_D3/FMC_DA3/UART4_TXpassive
C1VBATpassive
C2PE5/DCMI_D6/DEBUG_TRACED2/FMC_A21/PSSI_D6/SAI1_CK2/SAI1_SCK_A/SPI4_MISO/TAMP_IN8/TAMP_OUT7/TIM15_CH1passive
C3PE2/DCMI/DEBUG/ETH/FMC/LPTIM1/OCTOSPI1/PSSI/SAI1/SPI4/UART8/USART10passive
C4PI4/DCMI_D5/PSSI_D5/SAI2_MCLK_A/SPI2_RDY/~{TIM8_BKIN}passive
C5PE1/DCMI_D3/FDCAN1_TX/~{FMC_NBL1}/LPTIM1_IN2/PSSI_D3/UART8_TXpassive
C6PB6/CEC/DCMI/FDCAN2/FMC/I2C1/I2C4/I3C1/LPUART1/OCTOSPI1/PSSI/TIM16/TIM4/UART5/USART1passive
C7PG10/DCMI_D2/~{FMC_NE3}/I2S1_WS/PSSI_D2/~{SAI2_SD_B}/SDMMC2_D1/~{SPI1_NSS}passive
C8PD3/DCMI_D5/FMC_CLK/I2S2_CK/PSSI_D5/PWR_WKUP8/SPI2_SCK/USART2_CTS/~{USART2_NSS}passive
C9PD0/FDCAN1_RX/FMC_D2/FMC_DA2/TIM8_CH4N/UART4_RX/UART9_CTSpassive
D1PC14-OSC32_IN(OSC32_IN)/RCC_OSC32_INpassive
D2PE6/DCMI/DEBUG/FMC/PSSI/SAI1/SAI2/SPI4/TAMP/TIM15/TIM1passive
D3PE4/DCMI_D4/DEBUG_TRACED1/FMC_A20/PSSI_D4/SAI1_D2/SAI1_FS_A/~{SPI4_NSS}/TAMP_IN7/TAMP_OUT8/TIM15_CH1Npassive
D4PE3/DEBUG_TRACED0/FMC_A19/~{SAI1_SD_B}/TAMP_IN6/TAMP_OUT3/~{TIM15_BKIN}/USART10_TXpassive
D5PE0/DCMI/FDCAN1/FMC/LPTIM1/LPTIM2/PSSI/SAI2/SPI3/TIM4/UART8passive
D6PB7/DCMI/FDCAN1/FMC/I2C1/I2C4/I3C1/LPUART1/PSSI/PWR/SDMMC2/TIM17/TIM4/USART1passive
D7PG12/DCMI/ETH/FMC/LPTIM1/LPTIM5/PSSI/SDMMC2/SPI6/USART10/USART6passive
D8PD4/~{FMC_NOE}/OCTOSPI1_IO4/USART2_RTSpassive
D9PC12/DCMI/DEBUG/I2S3/PSSI/SDMMC1/SPI3/SPI6/TIM15/UART5/USART3passive
E1PC15-OSC32_OUT(OSC32_OUT)/ADC1_EXTI15/ADC2_EXTI15/RCC_OSC32_OUTpassive
E2PF0/FMC_A0/I2C2_SDA/LPTIM5_CH1passive
E3PC13/PWR_WKUP4/RTC_OUT1/RTC_TS/TAMP_IN1/TAMP_OUT2/TAMP_OUT3passive
E4PI8/PWR_WKUP3/RTC_OUT2/TAMP_IN2/TAMP_OUT3passive
E5PB9/DAC1/DCMI/FDCAN1/I2C1/I2C4/I2S2/I3C1/PSSI/SDMMC1/SDMMC2/SPI2/TIM17/TIM4/UART4passive
E6PB5/DCMI/ETH/FDCAN2/FMC/I2C1/I2C4/I2S1/I2S3/OCTOSPI1/PSSI/SPI1/SPI3/SPI6/TIM17/TIM3/UART5passive
E7PG9/DAC1/DCMI/FMC/I2S1/OCTOSPI1/PSSI/SAI2/SDMMC2/SPI1/USART6passive
E8PD2/DCMI_D11/DEBUG_TRACED2/LPTIM4_ETR/PSSI_D11/PWR_WKUP7/SDMMC1_CMD/~{TIM15_BKIN}/TIM3_ETR/UART5_RXpassive
E9PC8/DCMI/DEBUG/FMC/PSSI/SDMMC1/TIM3/TIM8/UART5/USART6passive
F1PF7/LPTIM5_CH2/OCTOSPI1_IO2/~{SAI1_MCLK_B}/SPI5_SCK/TIM17_CH1/UART7_TXpassive
F2VSSpassive
F3PF1/FMC_A1/I2C2_SCL/LPTIM5_CH2passive
F4PF2/FMC_A2/I2C2_SMBA/LPTIM3_CH2/LPTIM3_IN2/LPTIM5_IN1/UART12_TX/USART11_CKpassive
F5PB8/DCMI/ETH/FDCAN1/I2C1/I2C4/I3C1/PSSI/SDMMC1/SDMMC2/SPI4/TIM16/TIM4/UART4passive
F6PB3(JTDO/TRACESWO)/CRS/DEBUG/I2C2/I2S1/I2S3/LPTIM6/SDMMC2/SPI1/SPI3/SPI6/TIM2/UART12/UART7passive
F7PD6/DCMI/FMC/I2S3/OCTOSPI1/PSSI/SAI1/SDMMC2/SPI3/USART2passive
F8PG5/FMC_A15/~{FMC_BA1}/TIM1_ETRpassive
F9PG7/DCMI_D13/FMC_INT/I2C4_SCL/I3C1_SCL/PSSI_D13/SAI1_CK2/SAI1_MCLK_A/UCPD1_FRSTX/USART6_CKpassive
G1VDDpassive
G2PF9/DAC1_EXTI9/LPTIM5_IN2/OCTOSPI1_IO1/~{SAI1_FS_B}/SPI5_MOSI/TIM14_CH1/TIM17_CH1N/UART7_CTSpassive
G3PF5/FMC_A5/I2C4_SCL/I3C1_SCL/LPTIM3_CH1/LPTIM3_IN1/UART12_RX/USART11_CTS/~{USART11_NSS}passive
G4PF8/LPTIM5_IN1/OCTOSPI1_IO0/~{SAI1_SCK_B}/SPI5_MISO/TIM13_CH1/TIM16_CH1N/UART7_RTSpassive
G5PF4/FMC_A4/LPTIM3_ETR/USART11_RXpassive
G6PF3/FMC_A3/LPTIM3_IN1/LPTIM5_IN2/USART11_TXpassive
G7PF6/LPTIM5_CH1/OCTOSPI1_IO3/~{SAI1_SD_B}/~{SPI5_NSS}/TIM16_CH1/UART7_RXpassive
G8PD13/DCMI/FMC/I2C4/I3C1/LPTIM1/LPTIM2/LPTIM4/OCTOSPI1/PSSI/SAI2/TIM4/UART9passive
G9PG3/FMC_A13/LPTIM5_ETR/~{TIM8_BKIN2}/UART12_TXpassive
H1PH0-OSC_IN(PH0)/RCC_OSC_INpassive
H2VSSpassive
H3NRSTpassive
H4PF10/DCMI_D11/OCTOSPI1_CLK/PSSI_D11/PSSI_D15/SAI1_D3/~{TIM16_BKIN}passive
H5PA1/ADC1/ADC2/ETH/LPTIM1/OCTOSPI1/SAI2/TAMP/TIM15/TIM2/TIM5/UART4/USART2passive
H6PB1/ADC1_INP5/ADC2_INP5/ETH_RXD3/LPTIM3_CH2/OCTOSPI1_IO0/TIM1_CH3N/TIM3_CH4/TIM8_CH3Npassive
H7PF13/ADC2_INP2/FMC_A7/I2C4_SMBA/LPTIM6_IN1passive
H8PD11/ADC1/ADC2/FMC/I2C4/LPTIM2/OCTOSPI1/SAI1/SAI2/UART4/USART3passive
H9PD9/DAC1_EXTI9/FDCAN2_RX/FMC_D14/FMC_DA14/USART3_RXpassive
J1PH1-OSC_OUT(PH1)/RCC_OSC_OUTpassive
J2PC0/ADC1_INP10/ADC2_INP10/FMC_A25/FMC_SDNWE/OCTOSPI1_IO7/SAI1_MCLK_A/~{SAI2_FS_B}/SPI2_RDY/~{TIM16_BKIN}passive
J3PC1/ADC1/ADC2/DEBUG/ETH/I2S2/OCTOSPI1/PWR/SAI1/SAI2/SDMMC2/SPI2/TAMP/USART11passive
J4PH2/ETH_CRS/FMC_SDCKE0/LPTIM1_IN2/OCTOSPI1_IO4/~{SAI2_SCK_B}passive
J5PA5/ADC1/ADC2/DAC1/ETH/I2S1/PSSI/SPI1/SPI6/TIM2/TIM8passive
J6PF11/ADC1/ADC2/DCMI/FMC/LPTIM6/OCTOSPI1/PSSI/SAI2/SPI5passive
J7PF15/ADC1_EXTI15/ADC2_EXTI15/FMC_A9/I2C4_SDA/I3C1_SDApassive
J8PE8/FMC_D5/FMC_DA5/OCTOSPI1_IO5/TIM1_CH1N/UART12_CTS/UART7_TXpassive
J9PE14/FMC_D11/FMC_DA11/~{SAI2_MCLK_B}/SPI4_MOSI/TIM1_CH4passive
K1PC2/ADC1/ADC2/ETH/FMC/I2S2/OCTOSPI1/PWR/SPI2/TIM17/TIM4passive
K2PC3/ADC1/ADC2/ETH/FMC/I2S2/LPTIM3/OCTOSPI1/PWR/SAI1/SPI2passive
K3PA0/ADC1/ADC2/ETH/PWR/SAI2/SDMMC2/SPI3/SPI6/TAMP/TIM15/TIM2/TIM5/TIM8/UART4/USART2passive
K4PA3/ADC1/ADC2/ETH/I2S2/OCTOSPI1/SAI1/SPI2/TIM15/TIM2/TIM5/USART2passive
K5PA7/ADC1/ADC2/ETH/FMC/I2S1/OCTOSPI1/SPI1/SPI6/TIM14/TIM1/TIM3/TIM8/USART11passive
K6PF12/ADC1_INN2/ADC1_INP6/FMC_A6/LPTIM6_CH2passive
K7PG1/FMC_A11/I2S2_SDO/SPI2_MOSI/UART9_TXpassive
K8PE13/FMC_D10/FMC_DA10/~{SAI2_FS_B}/SPI4_MISO/TIM1_CH3passive
K9PB10/ETH_RX_ER/I2C2_SCL/I2S2_CK/LPTIM2_IN1/LPTIM3_CH1/~{OCTOSPI1_NCS}/SPI2_SCK/TIM2_CH3/USART3_TXpassive
L1VSSApassive
L2VREF-passive
L3PA2/ADC1/ADC2/ETH/LPTIM1/PWR/SAI2/TAMP/TIM15/TIM2/TIM5/USART2passive
L4PH5/FMC_SDNWE/I2C2_SDA/~{SPI5_NSS}/SPI6_RDYpassive
L5PC4/ADC1_INP4/ADC2_INP4/ETH_RXD0/FMC_SDNE0/I2S1_MCK/LPTIM2_ETR/SAI1_CK1/TIM2_CH4/USART3_RXpassive
L6PF14/ADC2_INN2/ADC2_INP6/FMC_A8/LPTIM6_IN2passive
L7PE7/FMC_D4/FMC_DA4/OCTOSPI1_IO4/TIM1_ETR/UART12_RTS/UART7_RXpassive
L8PE10/FMC_D7/FMC_DA7/OCTOSPI1_IO7/TIM1_CH2N/UART12_TX/UART7_CTSpassive
L9PE15/ADC1_EXTI15/ADC2_EXTI15/FMC_D12/FMC_DA12/~{TIM1_BKIN}/TIM1_CH4N/USART10_CKpassive
M1VDDApassive
M2VREF+passive
M3VSSpassive
M4PA4/ADC1/ADC2/DAC1/DCMI/I2S1/I2S3/LPTIM2/PSSI/SPI1/SPI3/SPI6/TIM5/USART2passive
M5PC5/ADC1/ADC2/ETH/FMC/OCTOSPI1/PSSI/SAI1/TIM1/UART12passive
M6PG0/FMC_A10/LPTIM4_IN1/UART9_RXpassive
M7VSSpassive
M8PE11/ADC1_EXTI11/ADC2_EXTI11/FMC_D8/FMC_DA8/~{OCTOSPI1_NCS}/~{SAI2_SD_B}/SPI1_RDY/~{SPI4_NSS}/TIM1_CH2passive
M9PE12/FMC_D9/FMC_DA9/~{SAI2_SCK_B}/SPI4_SCK/TIM1_CH3Npassive
N1PH4/I2C2_SCL/PSSI_D14/SPI5_RDY/SPI6_RDYpassive
N2PH3/ETH_COL/FMC_SDNE0/OCTOSPI1_IO5/~{SAI2_MCLK_B}passive
N3VDDpassive
N4PA6/ADC1/ADC2/DCMI/I2S1/OCTOSPI1/PSSI/SPI1/SPI6/TIM13/TIM1/TIM3/TIM8/USART11passive
N5PB0/ADC1/ADC2/ETH/LPTIM3/OCTOSPI1/TIM1/TIM3/TIM8/UART4/USART11passive
N6PB2/I2S3/LPTIM1/LPTIM5/OCTOSPI1/RCC/RTC/SAI1/SDMMC1/SPI1/SPI3/TIM8passive
N7VDDpassive
N8PE9/DAC1_EXTI9/FMC_D6/FMC_DA6/OCTOSPI1_IO6/TIM1_CH1/UART12_RX/UART7_RTSpassive
N9VLXSMPSpassive
A10PC10/DCMI_D8/ETH_TXD0/I2S3_CK/LPTIM3_ETR/OCTOSPI1_IO1/PSSI_D8/SDMMC1_D2/SPI3_SCK/UART4_TX/USART3_TXpassive
A11VDDpassive
A12PI3/DCMI_D10/I2S2_SDO/PSSI_D10/SPI2_MOSI/TIM8_ETRpassive
A13PH15/ADC1_EXTI15/ADC2_EXTI15/DCMI_D11/PSSI_D11/TIM8_CH3Npassive
B10PA15(JTDI)/CEC/ADC1/ADC2/DCMI/DEBUG/FMC/I2S1/I2S3/LPTIM3/PSSI/SPI1/SPI3/SPI6/TIM2/UART4/UART7passive
B11VSSpassive
B12PI0/DCMI_D13/I2S2_WS/PSSI_D13/~{SPI2_NSS}/TIM5_CH4passive
B13PA12/FDCAN1_TX/I2S2_CK/LPUART1_RTS/~{SAI2_FS_B}/SPI2_SCK/TIM1_ETR/UART4_TX/USART1_RTS/USB_DPpassive
C10PA14(JTCK/DEBUG_JTCK-SWCLK/SWCLK)passive
C11PI1/DCMI_D8/I2S2_CK/PSSI_D8/SPI2_SCK/~{TIM8_BKIN2}passive
C12PH13/DCMI_D3/FDCAN1_TX/LPTIM1_IN2/PSSI_D3/TIM8_CH1N/UART4_TX/UART8_TXpassive
C13PA11/ADC1/ADC2/FDCAN1/I2S2/LPUART1/SPI2/TIM1/UART4/USART1/USBpassive
D10PI2/DCMI_D9/I2S2_SDI/PSSI_D9/SPI2_MISO/TIM8_CH4passive
D11PH14/DCMI_D4/FDCAN1_RX/PSSI_D4/TIM8_CH2N/UART4_RXpassive
D12PA13(JTMS/DEBUG_JTMS-SWDIO/SWDIO)passive
D13VDDpassive
E10PA8/DCMI/FMC/I2C3/PSSI/RCC/SPI1/TIM1/TIM8/UART7/USART1/USBpassive
E11PA10/DCMI_D1/FDCAN2_TX/LPTIM2_IN2/LPUART1_RX/PSSI_D1/SDMMC1_D0/TIM1_CH3/UCPD1_FRSTX/USART1_RXpassive
E12VSSpassive
E13VDDUSBpassive
F10PC6/DCMI/FMC/I2S2/OCTOSPI1/PSSI/SAI1/SDMMC1/SDMMC2/TIM3/TIM8/USART6passive
F11PC7/DCMI/DEBUG/FMC/I2S3/OCTOSPI1/PSSI/SDMMC1/SDMMC2/TIM3/TIM8/USART6passive
F12PC9/AUDIOCLK/DAC1/DCMI/FMC/I2C3/OCTOSPI1/PSSI/RCC/SDMMC1/TIM3/TIM8/UART5/UCPD1passive
F13PA9/DAC1/DCMI/ETH/FMC/I2C3/I2S2/LPUART1/PSSI/SPI2/TIM1/UCPD1/USART1passive
G10PD15/ADC1_EXTI15/ADC2_EXTI15/FMC_D1/FMC_DA1/TIM4_CH4/UART8_RTS/UART9_TXpassive
G11PG4/FMC_A14/~{FMC_BA0}/LPTIM4_ETR/~{TIM1_BKIN2}passive
G12PG6/DCMI_D12/~{FMC_NE3}/I2C4_SDA/I3C1_SDA/~{OCTOSPI1_NCS}/PSSI_D12/SPI1_RDY/~{TIM17_BKIN}/UCPD1_FRSTXpassive
G13PG8/ETH_PPS_OUT/FMC_SDCLK/~{SPI6_NSS}/TIM8_ETR/USART6_RTSpassive
H10PB15/ADC1/ADC2/DCMI/ETH/I2S2/OCTOSPI1/PSSI/PWR/RTC/SDMMC2/SPI2/TIM12/TIM1/TIM8/UART4/UART5/USART11passive
H11PD12/DCMI/FMC/I2C4/I3C1/LPTIM1/LPTIM2/OCTOSPI1/PSSI/SAI1/SAI2/TIM4/UART4/USART3passive
H12PD14/FMC_D0/FMC_DA0/TIM4_CH3/UART8_CTS/UART9_RXpassive
H13PG2/FMC_A12/LPTIM6_ETR/~{TIM8_BKIN}/UART12_RXpassive
J10PB14/ETH/I2S2/LPTIM3/SDMMC2/SPI2/TIM12/TIM1/TIM8/UART4/UCPD1/USART1/USART3passive
J11PD8/FMC_D13/FMC_DA13/USART3_TXpassive
J12VSSpassive
J13VDDpassive
K10PH10/DCMI_D1/I2C4_SMBA/PSSI_D1/SPI5_RDY/TIM1_CH1N/TIM5_CH1/TIM8_CH3passive
K11PB12/ETH/FDCAN2/I2C2/I2S2/OCTOSPI1/SPI2/TIM1/UART5/UCPD1/USART3passive
K12PB13/ETH/FDCAN2/I2C2/I2S2/LPTIM2/LPTIM3/SDMMC1/SPI2/TIM1/UART5/UCPD1/USART3passive
K13PD10/FMC_D15/FMC_DA15/LPTIM2_CH2/USART3_CKpassive
L10PB11/ADC1/ADC2/ETH/FMC/I2C2/LPTIM2/SPI2/SPI4/TIM2/USART3passive
L11PH7/DCMI_D9/ETH_RXD3/FMC_SDCKE1/I2C3_SCL/PSSI_D9/SPI5_MISO/TIM1_CH3/TIM8_CH1Npassive
L12PH12/DCMI_D3/I2C4_SDA/I3C1_SDA/PSSI_D3/~{TIM1_BKIN}/TIM5_CH3/~{TIM8_BKIN}/TIM8_CH4Npassive
L13PH11/ADC1_EXTI11/ADC2_EXTI11/DCMI_D2/I2C4_SCL/I3C1_SCL/PSSI_D2/TIM1_CH1/TIM5_CH2/TIM8_CH3Npassive
M10VSSSMPSpassive
M11VSSpassive
M12PH8/DCMI_HSYNC/I2C3_SDA/PSSI_DE/SPI5_MOSI/TIM1_CH2N/TIM5_ETR/TIM8_CH2passive
M13PH9/DAC1_EXTI9/DCMI_D0/I2C3_SMBA/PSSI_D0/~{SPI5_NSS}/TIM12_CH2/TIM1_CH2/TIM8_CH2Npassive
N10VDDSMPSpassive
N11VCAPpassive
N12VDDpassive
N13PH6/DCMI_D8/ETH_RXD2/FMC_SDNE1/I2C2_SMBA/PSSI_D8/SPI5_SCK/TIM12_CH1/TIM1_CH3N/TIM8_CH1passive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed