Get Trace

ST MICROELECTRONICS STM32H563IG

celestial-altium-MCU_STM32

Symbol

201 pins
Schematic symbol for ST MICROELECTRONICS STM32H563IG
Units
9
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
A1PE3/DEBUG_TRACED0/FMC_A19/~{SAI1_SD_B}/TAMP_IN6/TAMP_OUT3/~{TIM15_BKIN}/USART10_TXpassive
A2PE2/DCMI/DEBUG/ETH/FMC/LPTIM1/OCTOSPI1/PSSI/SAI1/SPI4/UART8/USART10passive
A3PE1/DCMI_D3/FDCAN1_TX/~{FMC_NBL1}/LPTIM1_IN2/PSSI_D3/UART8_TXpassive
A4PE0/DCMI/FDCAN1/FMC/LPTIM1/LPTIM2/PSSI/SAI2/SPI3/TIM4/UART8passive
A5PB8/DCMI/ETH/FDCAN1/I2C1/I2C4/I3C1/PSSI/SDMMC1/SDMMC2/SPI4/TIM16/TIM4/UART4passive
A6PB5/DCMI/ETH/FDCAN2/FMC/I2C1/I2C4/I2S1/I2S3/OCTOSPI1/PSSI/SPI1/SPI3/SPI6/TIM17/TIM3/UART5passive
A7PG14/DEBUG/ETH/FMC/LPTIM1/LPTIM5/OCTOSPI1/SDMMC2/SPI6/USART10/USART6passive
A8PG13/DEBUG/ETH/FMC/LPTIM1/LPTIM5/SDMMC2/SPI6/USART10/USART6passive
A9PB4(NJTRST)/DCMI/DEBUG/I2S1/I2S2/I2S3/LPTIM1/OCTOSPI1/PSSI/SDMMC2/SPI1/SPI2/SPI3/SPI6/TIM16/TIM3passive
B1PE4/DCMI_D4/DEBUG_TRACED1/FMC_A20/PSSI_D4/SAI1_D2/SAI1_FS_A/~{SPI4_NSS}/TAMP_IN7/TAMP_OUT8/TIM15_CH1Npassive
B2PE5/DCMI_D6/DEBUG_TRACED2/FMC_A21/PSSI_D6/SAI1_CK2/SAI1_SCK_A/SPI4_MISO/TAMP_IN8/TAMP_OUT7/TIM15_CH1passive
B3PE6/DCMI/DEBUG/FMC/PSSI/SAI1/SAI2/SPI4/TAMP/TIM15/TIM1passive
B4PB9/DAC1/DCMI/FDCAN1/I2C1/I2C4/I2S2/I3C1/PSSI/SDMMC1/SDMMC2/SPI2/TIM17/TIM4/UART4passive
B5PB7/DCMI/FDCAN1/FMC/I2C1/I2C4/I3C1/LPUART1/PSSI/PWR/SDMMC2/TIM17/TIM4/USART1passive
B6PB6/CEC/DCMI/FDCAN2/FMC/I2C1/I2C4/I3C1/LPUART1/OCTOSPI1/PSSI/TIM16/TIM4/UART5/USART1passive
B7PG15/ADC1_EXTI15/ADC2_EXTI15/DCMI_D13/FMC_SDNCAS/PSSI_D13/SPI4_RDY/USART10_CK/USART6_CTS/~{USART6_NSS}passive
B8PG12/DCMI/ETH/FMC/LPTIM1/LPTIM5/PSSI/SDMMC2/SPI6/USART10/USART6passive
B9PG11/ADC1/ADC2/DCMI/ETH/I2S1/LPTIM1/PSSI/SDMMC2/SPI1/USART10/USART11passive
C1VBATpassive
C2PI7/DCMI_D7/PSSI_D7/SAI2_FS_A/TIM8_CH3passive
C3PI6/DCMI_D6/PSSI_D6/SAI2_SD_A/TIM8_CH2passive
C4PI5/DCMI_VSYNC/PSSI_RDY/SAI2_SCK_A/TIM8_CH1passive
C5VDDpassive
C6VCAPpassive
C7VDDpassive
C8VDDIO2passive
C9VDDpassive
D1PC13/PWR_WKUP4/RTC_OUT1/RTC_TS/TAMP_IN1/TAMP_OUT2/TAMP_OUT3passive
D2PI8/PWR_WKUP3/RTC_OUT2/TAMP_IN2/TAMP_OUT3passive
D3PI9/DAC1_EXTI9/FDCAN1_RX/UART4_RXpassive
D4PI4/DCMI_D5/PSSI_D5/SAI2_MCLK_A/SPI2_RDY/~{TIM8_BKIN}passive
D5VSSpassive
D6BOOT0passive
D7VSSpassive
D8VSSpassive
D9VSSpassive
E1PC14-OSC32_IN(OSC32_IN)/RCC_OSC32_INpassive
E2PF0/FMC_A0/I2C2_SDA/LPTIM5_CH1passive
E3PI10/ETH_RX_ER/FDCAN1_RX/PSSI_D14passive
E4PI11/ADC1_EXTI11/ADC2_EXTI11/PSSI_D15/TAMP_IN4/TAMP_OUT5passive
F1PC15-OSC32_OUT(OSC32_OUT)/ADC1_EXTI15/ADC2_EXTI15/RCC_OSC32_OUTpassive
F2VSSpassive
F3VDDpassive
F4PH2/ETH_CRS/FMC_SDCKE0/LPTIM1_IN2/OCTOSPI1_IO4/~{SAI2_SCK_B}passive
F6VSSpassive
F7VSSpassive
F8VSSpassive
F9VSSpassive
G1PH0-OSC_IN(PH0)/RCC_OSC_INpassive
G2VSSpassive
G3VDDpassive
G4PH3/ETH_COL/FMC_SDNE0/OCTOSPI1_IO5/~{SAI2_MCLK_B}passive
G6VSSpassive
G7VSSpassive
G8VSSpassive
G9VSSpassive
H1PH1-OSC_OUT(PH1)/RCC_OSC_OUTpassive
H2PF2/FMC_A2/I2C2_SMBA/LPTIM3_CH2/LPTIM3_IN2/LPTIM5_IN1/UART12_TX/USART11_CKpassive
H3PF1/FMC_A1/I2C2_SCL/LPTIM5_CH2passive
H4PH4/I2C2_SCL/PSSI_D14/SPI5_RDY/SPI6_RDYpassive
H6VSSpassive
H7VSSpassive
H8VSSpassive
H9VSSpassive
J1NRSTpassive
J2PF3/FMC_A3/LPTIM3_IN1/LPTIM5_IN2/USART11_TXpassive
J3PF4/FMC_A4/LPTIM3_ETR/USART11_RXpassive
J4PH5/FMC_SDNWE/I2C2_SDA/~{SPI5_NSS}/SPI6_RDYpassive
J6VSSpassive
J7VSSpassive
J8VSSpassive
J9VSSpassive
K1PF7/LPTIM5_CH2/OCTOSPI1_IO2/~{SAI1_MCLK_B}/SPI5_SCK/TIM17_CH1/UART7_TXpassive
K2PF6/LPTIM5_CH1/OCTOSPI1_IO3/~{SAI1_SD_B}/~{SPI5_NSS}/TIM16_CH1/UART7_RXpassive
K3PF5/FMC_A5/I2C4_SCL/I3C1_SCL/LPTIM3_CH1/LPTIM3_IN1/UART12_RX/USART11_CTS/~{USART11_NSS}passive
K4VDDpassive
K6VSSpassive
K7VSSpassive
K8VSSpassive
K9VSSpassive
L1PF10/DCMI_D11/OCTOSPI1_CLK/PSSI_D11/PSSI_D15/SAI1_D3/~{TIM16_BKIN}passive
L2PF9/DAC1_EXTI9/LPTIM5_IN2/OCTOSPI1_IO1/~{SAI1_FS_B}/SPI5_MOSI/TIM14_CH1/TIM17_CH1N/UART7_CTSpassive
L3PF8/LPTIM5_IN1/OCTOSPI1_IO0/~{SAI1_SCK_B}/SPI5_MISO/TIM13_CH1/TIM16_CH1N/UART7_RTSpassive
L4VSSpassive
M1VSSApassive
M2PC0/ADC1_INP10/ADC2_INP10/FMC_A25/FMC_SDNWE/OCTOSPI1_IO7/SAI1_MCLK_A/~{SAI2_FS_B}/SPI2_RDY/~{TIM16_BKIN}passive
M3PC1/ADC1/ADC2/DEBUG/ETH/I2S2/OCTOSPI1/PWR/SAI1/SAI2/SDMMC2/SPI2/TAMP/USART11passive
M4PC2/ADC1/ADC2/ETH/FMC/I2S2/OCTOSPI1/PWR/SPI2/TIM17/TIM4passive
M5PC3/ADC1/ADC2/ETH/FMC/I2S2/LPTIM3/OCTOSPI1/PWR/SAI1/SPI2passive
M6PB2/I2S3/LPTIM1/LPTIM5/OCTOSPI1/RCC/RTC/SAI1/SDMMC1/SPI1/SPI3/TIM8passive
M7PG1/FMC_A11/I2S2_SDO/SPI2_MOSI/UART9_TXpassive
M8VSSpassive
M9VSSpassive
N1VREF-passive
N2PA1/ADC1/ADC2/ETH/LPTIM1/OCTOSPI1/SAI2/TAMP/TIM15/TIM2/TIM5/UART4/USART2passive
N3PA0/ADC1/ADC2/ETH/PWR/SAI2/SDMMC2/SPI3/SPI6/TAMP/TIM15/TIM2/TIM5/TIM8/UART4/USART2passive
N4PA4/ADC1/ADC2/DAC1/DCMI/I2S1/I2S3/LPTIM2/PSSI/SPI1/SPI3/SPI6/TIM5/USART2passive
N5PC4/ADC1_INP4/ADC2_INP4/ETH_RXD0/FMC_SDNE0/I2S1_MCK/LPTIM2_ETR/SAI1_CK1/TIM2_CH4/USART3_RXpassive
N6PF13/ADC2_INP2/FMC_A7/I2C4_SMBA/LPTIM6_IN1passive
N7PG0/FMC_A10/LPTIM4_IN1/UART9_RXpassive
N8VDDpassive
N9VDDpassive
P1VREF+passive
P2PA2/ADC1/ADC2/ETH/LPTIM1/PWR/SAI2/TAMP/TIM15/TIM2/TIM5/USART2passive
P3PA6/ADC1/ADC2/DCMI/I2S1/OCTOSPI1/PSSI/SPI1/SPI6/TIM13/TIM1/TIM3/TIM8/USART11passive
P4PA5/ADC1/ADC2/DAC1/ETH/I2S1/PSSI/SPI1/SPI6/TIM2/TIM8passive
P5PC5/ADC1/ADC2/ETH/FMC/OCTOSPI1/PSSI/SAI1/TIM1/UART12passive
P6PF12/ADC1_INN2/ADC1_INP6/FMC_A6/LPTIM6_CH2passive
P7PF15/ADC1_EXTI15/ADC2_EXTI15/FMC_A9/I2C4_SDA/I3C1_SDApassive
P8PE8/FMC_D5/FMC_DA5/OCTOSPI1_IO5/TIM1_CH1N/UART12_CTS/UART7_TXpassive
P9PE9/DAC1_EXTI9/FMC_D6/FMC_DA6/OCTOSPI1_IO6/TIM1_CH1/UART12_RX/UART7_RTSpassive
R1VDDApassive
R2PA3/ADC1/ADC2/ETH/I2S2/OCTOSPI1/SAI1/SPI2/TIM15/TIM2/TIM5/USART2passive
R3PA7/ADC1/ADC2/ETH/FMC/I2S1/OCTOSPI1/SPI1/SPI6/TIM14/TIM1/TIM3/TIM8/USART11passive
R4PB1/ADC1_INP5/ADC2_INP5/ETH_RXD3/LPTIM3_CH2/OCTOSPI1_IO0/TIM1_CH3N/TIM3_CH4/TIM8_CH3Npassive
R5PB0/ADC1/ADC2/ETH/LPTIM3/OCTOSPI1/TIM1/TIM3/TIM8/UART4/USART11passive
R6PF11/ADC1/ADC2/DCMI/FMC/LPTIM6/OCTOSPI1/PSSI/SAI2/SPI5passive
R7PF14/ADC2_INN2/ADC2_INP6/FMC_A8/LPTIM6_IN2passive
R8PE7/FMC_D4/FMC_DA4/OCTOSPI1_IO4/TIM1_ETR/UART12_RTS/UART7_RXpassive
R9PE10/FMC_D7/FMC_DA7/OCTOSPI1_IO7/TIM1_CH2N/UART12_TX/UART7_CTSpassive
A10PB3(JTDO/TRACESWO)/CRS/DEBUG/I2C2/I2S1/I2S3/LPTIM6/SDMMC2/SPI1/SPI3/SPI6/TIM2/UART12/UART7passive
A11PD7/~{FMC_NCE}/~{FMC_NE1}/I2S1_SDO/LPTIM4_OUT/OCTOSPI1_IO7/SDMMC2_CMD/SPI1_MOSI/USART2_CKpassive
A12PC12/DCMI/DEBUG/I2S3/PSSI/SDMMC1/SPI3/SPI6/TIM15/UART5/USART3passive
A13PA15(JTDI)/CEC/ADC1/ADC2/DCMI/DEBUG/FMC/I2S1/I2S3/LPTIM3/PSSI/SPI1/SPI3/SPI6/TIM2/UART4/UART7passive
A14PA14(JTCK/DEBUG_JTCK-SWCLK/SWCLK)passive
A15PA13(JTMS/DEBUG_JTMS-SWDIO/SWDIO)passive
B10PG10/DCMI_D2/~{FMC_NE3}/I2S1_WS/PSSI_D2/~{SAI2_SD_B}/SDMMC2_D1/~{SPI1_NSS}passive
B11PD6/DCMI/FMC/I2S3/OCTOSPI1/PSSI/SAI1/SDMMC2/SPI3/USART2passive
B12PD0/FDCAN1_RX/FMC_D2/FMC_DA2/TIM8_CH4N/UART4_RX/UART9_CTSpassive
B13PC11/ADC1/ADC2/DCMI/I2S3/LPTIM3/OCTOSPI1/PSSI/SDMMC1/SPI3/UART4/USART3passive
B14PC10/DCMI_D8/ETH_TXD0/I2S3_CK/LPTIM3_ETR/OCTOSPI1_IO1/PSSI_D8/SDMMC1_D2/SPI3_SCK/UART4_TX/USART3_TXpassive
B15PA12/FDCAN1_TX/I2S2_CK/LPUART1_RTS/~{SAI2_FS_B}/SPI2_SCK/TIM1_ETR/UART4_TX/USART1_RTS/USB_DPpassive
C10PG9/DAC1/DCMI/FMC/I2S1/OCTOSPI1/PSSI/SAI2/SDMMC2/SPI1/USART6passive
C11PD5/FDCAN1_TX/~{FMC_NWE}/OCTOSPI1_IO5/SPI2_RDY/TIM1_CH4N/USART2_TXpassive
C12PD1/FDCAN1_TX/FMC_D3/FMC_DA3/UART4_TXpassive
C13PI3/DCMI_D10/I2S2_SDO/PSSI_D10/SPI2_MOSI/TIM8_ETRpassive
C14PI2/DCMI_D9/I2S2_SDI/PSSI_D9/SPI2_MISO/TIM8_CH4passive
C15PA11/ADC1/ADC2/FDCAN1/I2S2/LPUART1/SPI2/TIM1/UART4/USART1/USBpassive
D10PD4/~{FMC_NOE}/OCTOSPI1_IO4/USART2_RTSpassive
D11PD3/DCMI_D5/FMC_CLK/I2S2_CK/PSSI_D5/PWR_WKUP8/SPI2_SCK/USART2_CTS/~{USART2_NSS}passive
D12PD2/DCMI_D11/DEBUG_TRACED2/LPTIM4_ETR/PSSI_D11/PWR_WKUP7/SDMMC1_CMD/~{TIM15_BKIN}/TIM3_ETR/UART5_RXpassive
D13PH15/ADC1_EXTI15/ADC2_EXTI15/DCMI_D11/PSSI_D11/TIM8_CH3Npassive
D14PI1/DCMI_D8/I2S2_CK/PSSI_D8/SPI2_SCK/~{TIM8_BKIN2}passive
D15PA10/DCMI_D1/FDCAN2_TX/LPTIM2_IN2/LPUART1_RX/PSSI_D1/SDMMC1_D0/TIM1_CH3/UCPD1_FRSTX/USART1_RXpassive
E12PH13/DCMI_D3/FDCAN1_TX/LPTIM1_IN2/PSSI_D3/TIM8_CH1N/UART4_TX/UART8_TXpassive
E13PH14/DCMI_D4/FDCAN1_RX/PSSI_D4/TIM8_CH2N/UART4_RXpassive
E14PI0/DCMI_D13/I2S2_WS/PSSI_D13/~{SPI2_NSS}/TIM5_CH4passive
E15PA9/DAC1/DCMI/ETH/FMC/I2C3/I2S2/LPUART1/PSSI/SPI2/TIM1/UCPD1/USART1passive
F10VSSpassive
F12VSSpassive
F13VDDpassive
F14PC9/AUDIOCLK/DAC1/DCMI/FMC/I2C3/OCTOSPI1/PSSI/RCC/SDMMC1/TIM3/TIM8/UART5/UCPD1passive
F15PA8/DCMI/FMC/I2C3/PSSI/RCC/SPI1/TIM1/TIM8/UART7/USART1/USBpassive
G10VSSpassive
G12VSSpassive
G13VDDpassive
G14PC8/DCMI/DEBUG/FMC/PSSI/SDMMC1/TIM3/TIM8/UART5/USART6passive
G15PC7/DCMI/DEBUG/FMC/I2S3/OCTOSPI1/PSSI/SDMMC1/SDMMC2/TIM3/TIM8/USART6passive
H10VSSpassive
H12VSSpassive
H13VDDUSBpassive
H14PG8/ETH_PPS_OUT/FMC_SDCLK/~{SPI6_NSS}/TIM8_ETR/USART6_RTSpassive
H15PC6/DCMI/FMC/I2S2/OCTOSPI1/PSSI/SAI1/SDMMC1/SDMMC2/TIM3/TIM8/USART6passive
J10VSSpassive
J12VDDpassive
J13VDDpassive
J14PG7/DCMI_D13/FMC_INT/I2C4_SCL/I3C1_SCL/PSSI_D13/SAI1_CK2/SAI1_MCLK_A/UCPD1_FRSTX/USART6_CKpassive
J15PG6/DCMI_D12/~{FMC_NE3}/I2C4_SDA/I3C1_SDA/~{OCTOSPI1_NCS}/PSSI_D12/SPI1_RDY/~{TIM17_BKIN}/UCPD1_FRSTXpassive
K10VSSpassive
K12PH12/DCMI_D3/I2C4_SDA/I3C1_SDA/PSSI_D3/~{TIM1_BKIN}/TIM5_CH3/~{TIM8_BKIN}/TIM8_CH4Npassive
K13PG5/FMC_A15/~{FMC_BA1}/TIM1_ETRpassive
K14PG4/FMC_A14/~{FMC_BA0}/LPTIM4_ETR/~{TIM1_BKIN2}passive
K15PG3/FMC_A13/LPTIM5_ETR/~{TIM8_BKIN2}/UART12_TXpassive
L12PH11/ADC1_EXTI11/ADC2_EXTI11/DCMI_D2/I2C4_SCL/I3C1_SCL/PSSI_D2/TIM1_CH1/TIM5_CH2/TIM8_CH3Npassive
L13PH10/DCMI_D1/I2C4_SMBA/PSSI_D1/SPI5_RDY/TIM1_CH1N/TIM5_CH1/TIM8_CH3passive
L14PD15/ADC1_EXTI15/ADC2_EXTI15/FMC_D1/FMC_DA1/TIM4_CH4/UART8_RTS/UART9_TXpassive
L15PG2/FMC_A12/LPTIM6_ETR/~{TIM8_BKIN}/UART12_RXpassive
M10VCAPpassive
M11PH6/DCMI_D8/ETH_RXD2/FMC_SDNE1/I2C2_SMBA/PSSI_D8/SPI5_SCK/TIM12_CH1/TIM1_CH3N/TIM8_CH1passive
M12PH8/DCMI_HSYNC/I2C3_SDA/PSSI_DE/SPI5_MOSI/TIM1_CH2N/TIM5_ETR/TIM8_CH2passive
M13PH9/DAC1_EXTI9/DCMI_D0/I2C3_SMBA/PSSI_D0/~{SPI5_NSS}/TIM12_CH2/TIM1_CH2/TIM8_CH2Npassive
M14PD14/FMC_D0/FMC_DA0/TIM4_CH3/UART8_CTS/UART9_RXpassive
M15PD13/DCMI/FMC/I2C4/I3C1/LPTIM1/LPTIM2/LPTIM4/OCTOSPI1/PSSI/SAI2/TIM4/UART9passive
N10VDDpassive
N11PE13/FMC_D10/FMC_DA10/~{SAI2_FS_B}/SPI4_MISO/TIM1_CH3passive
N12PH7/DCMI_D9/ETH_RXD3/FMC_SDCKE1/I2C3_SCL/PSSI_D9/SPI5_MISO/TIM1_CH3/TIM8_CH1Npassive
N13PD12/DCMI/FMC/I2C4/I3C1/LPTIM1/LPTIM2/OCTOSPI1/PSSI/SAI1/SAI2/TIM4/UART4/USART3passive
N14PD11/ADC1/ADC2/FMC/I2C4/LPTIM2/OCTOSPI1/SAI1/SAI2/UART4/USART3passive
N15PD10/FMC_D15/FMC_DA15/LPTIM2_CH2/USART3_CKpassive
P10PE11/ADC1_EXTI11/ADC2_EXTI11/FMC_D8/FMC_DA8/~{OCTOSPI1_NCS}/~{SAI2_SD_B}/SPI1_RDY/~{SPI4_NSS}/TIM1_CH2passive
P11PE14/FMC_D11/FMC_DA11/~{SAI2_MCLK_B}/SPI4_MOSI/TIM1_CH4passive
P12PB12/ETH/FDCAN2/I2C2/I2S2/OCTOSPI1/SPI2/TIM1/UART5/UCPD1/USART3passive
P13PB13/ETH/FDCAN2/I2C2/I2S2/LPTIM2/LPTIM3/SDMMC1/SPI2/TIM1/UART5/UCPD1/USART3passive
P14PD9/DAC1_EXTI9/FDCAN2_RX/FMC_D14/FMC_DA14/USART3_RXpassive
P15PD8/FMC_D13/FMC_DA13/USART3_TXpassive
R10PE12/FMC_D9/FMC_DA9/~{SAI2_SCK_B}/SPI4_SCK/TIM1_CH3Npassive
R11PE15/ADC1_EXTI15/ADC2_EXTI15/FMC_D12/FMC_DA12/~{TIM1_BKIN}/TIM1_CH4N/USART10_CKpassive
R12PB10/ETH_RX_ER/I2C2_SCL/I2S2_CK/LPTIM2_IN1/LPTIM3_CH1/~{OCTOSPI1_NCS}/SPI2_SCK/TIM2_CH3/USART3_TXpassive
R13PB11/ADC1/ADC2/ETH/FMC/I2C2/LPTIM2/SPI2/SPI4/TIM2/USART3passive
R14PB14/ETH/I2S2/LPTIM3/SDMMC2/SPI2/TIM12/TIM1/TIM8/UART4/UCPD1/USART1/USART3passive
R15PB15/ADC1/ADC2/DCMI/ETH/I2S2/OCTOSPI1/PSSI/PWR/RTC/SDMMC2/SPI2/TIM12/TIM1/TIM8/UART4/UART5/USART11passive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed