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ST MICROELECTRONICS STM32L431VC

celestial-altium-MCU_STM32

Symbol

100 pins
Schematic symbol for ST MICROELECTRONICS STM32L431VC
Units
5
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
1PE2/SAI1_MCLK_A/SYS_TRACECLK/TSC_G7_IO1passive
2PE3/~{SAI1_SD_B}/SYS_TRACED0/TSC_G7_IO2passive
3PE4/SAI1_FS_A/SYS_TRACED1/TSC_G7_IO3passive
4PE5/SAI1_SCK_A/SYS_TRACED2/TSC_G7_IO4passive
5PE6/RTC_TAMP3/SAI1_SD_A/SYS_TRACED3/SYS_WKUP3passive
6VBATpassive
7PC13/RTC_OUT_ALARM/RTC_OUT_CALIB/RTC_TAMP1/RTC_TS/SYS_WKUP2passive
8PC14-OSC32_IN_(PC14)/RCC_OSC32_INpassive
9PC15-OSC32_OUT_(PC15)/ADC1_EXTI15/RCC_OSC32_OUTpassive
10VSSpassive
11VDDpassive
12PH0-OSC_IN_(PH0)/RCC_OSC_INpassive
13PH1-OSC_OUT_(PH1)/RCC_OSC_OUTpassive
14NRSTpassive
15PC0/ADC1_IN1/I2C3_SCL/LPTIM1_IN1/LPTIM2_IN1/LPUART1_RXpassive
16PC1/ADC1_IN2/I2C3_SDA/LPTIM1_OUT/LPUART1_TXpassive
17PC2/ADC1_IN3/LPTIM1_IN2/SPI2_MISOpassive
18PC3/ADC1_IN4/LPTIM1_ETR/LPTIM2_ETR/SAI1_SD_A/SPI2_MOSIpassive
19VSSApassive
20VREF-passive
21VREF+/VREFBUF_OUTpassive
22VDDApassive
23PA0/ADC1/COMP1/OPAMP1/RTC/SAI1/SYS/TIM2/USART2passive
24PA1/ADC1_IN6/COMP1_INP/I2C1_SMBA/OPAMP1_VINM/SPI1_SCK/TIM15_CH1N/TIM2_CH2/USART2_DE/USART2_RTSpassive
25PA2/ADC1/COMP2/LPUART1/QUADSPI/RCC/SYS/TIM15/TIM2/USART2passive
26PA3/ADC1_IN8/COMP2_INP/LPUART1_RX/OPAMP1_VOUT/QUADSPI_CLK/SAI1_MCLK_A/TIM15_CH2/TIM2_CH4/USART2_RXpassive
27VSSpassive
28VDDpassive
29PA4/ADC1_IN9/COMP1_INM/COMP2_INM/DAC1_OUT1/LPTIM2_OUT/~{SAI1_FS_B}/~{SPI1_NSS}/~{SPI3_NSS}/USART2_CKpassive
30PA5/ADC1_IN10/COMP1_INM/COMP2_INM/DAC1_OUT2/LPTIM2_ETR/SPI1_SCK/TIM2_CH1/TIM2_ETRpassive
31PA6/ADC1/COMP1/LPUART1/QUADSPI/SPI1/TIM16/TIM1/USART3passive
32PA7/ADC1_IN12/COMP2_OUT/I2C3_SCL/~{QUADSPI_BK1_IO2}/SPI1_MOSI/TIM1_CH1Npassive
33PC4/ADC1_IN13/COMP1_INM/USART3_TXpassive
34PC5/ADC1_IN14/COMP1_INP/SYS_WKUP5/USART3_RXpassive
35PB0/ADC1_IN15/COMP1_OUT/~{QUADSPI_BK1_IO1}/SAI1_EXTCLK/~{SPI1_NSS}/TIM1_CH2N/USART3_CKpassive
36PB1/ADC1/COMP1/LPTIM2/LPUART1/QUADSPI/TIM1/USART3passive
37PB2/COMP1_INP/I2C3_SMBA/LPTIM1_OUT/RTC_OUT_ALARM/RTC_OUT_CALIBpassive
38PE7/~{SAI1_SD_B}/TIM1_ETRpassive
39PE8/~{SAI1_SCK_B}/TIM1_CH1Npassive
40PE9/DAC1_EXTI9/~{SAI1_FS_B}/TIM1_CH1passive
41PE10/QUADSPI_CLK/~{SAI1_MCLK_B}/TIM1_CH2N/TSC_G5_IO1passive
42PE11/ADC1_EXTI11/~{QUADSPI_BK1_NCS}/TIM1_CH2/TSC_G5_IO2passive
43PE12/~{QUADSPI_BK1_IO0}/~{SPI1_NSS}/TIM1_CH3N/TSC_G5_IO3passive
44PE13/~{QUADSPI_BK1_IO1}/SPI1_SCK/TIM1_CH3/TSC_G5_IO4passive
45PE14/~{QUADSPI_BK1_IO2}/SPI1_MISO/~{TIM1_BKIN2}/~{TIM1_BKIN2_COMP2}/TIM1_CH4passive
46PE15/ADC1_EXTI15/~{QUADSPI_BK1_IO3}/SPI1_MOSI/~{TIM1_BKIN}/~{TIM1_BKIN_COMP1}passive
47PB10/COMP1_OUT/I2C2_SCL/LPUART1_RX/QUADSPI_CLK/SAI1_SCK_A/SPI2_SCK/TIM2_CH3/TSC_SYNC/USART3_TXpassive
48PB11/ADC1_EXTI11/COMP2_OUT/I2C2_SDA/LPUART1_TX/~{QUADSPI_BK1_NCS}/TIM2_CH4/USART3_RXpassive
49VSSpassive
50VDDpassive
51PB12/I2C2/LPUART1/SAI1/SPI2/SWPMI1/TIM15/TIM1/TSC/USART3passive
52PB13/I2C2_SCL/LPUART1_CTS/SAI1_SCK_A/SPI2_SCK/SWPMI1_TX/TIM15_CH1N/TIM1_CH1N/TSC_G1_IO2/USART3_CTSpassive
53PB14/I2C2_SDA/SAI1_MCLK_A/SPI2_MISO/SWPMI1_RX/TIM15_CH1/TIM1_CH2N/TSC_G1_IO3/USART3_DE/USART3_RTSpassive
54PB15/ADC1_EXTI15/RTC_REFIN/SAI1_SD_A/SPI2_MOSI/SWPMI1_SUSPEND/TIM15_CH2/TIM1_CH3N/TSC_G1_IO4passive
55PD8/USART3_TXpassive
56PD9/DAC1_EXTI9/USART3_RXpassive
57PD10/TSC_G6_IO1/USART3_CKpassive
58PD11/ADC1_EXTI11/LPTIM2_ETR/TSC_G6_IO2/USART3_CTSpassive
59PD12/LPTIM2_IN1/TSC_G6_IO3/USART3_DE/USART3_RTSpassive
60PD13/LPTIM2_OUT/TSC_G6_IO4passive
61PD14passive
62PD15/ADC1_EXTI15passive
63PC6/SDMMC1_D6/TSC_G4_IO1passive
64PC7/SDMMC1_D7/TSC_G4_IO2passive
65PC8/SDMMC1_D0/TSC_G4_IO3passive
66PC9/DAC1_EXTI9/SDMMC1_D1/TSC_G4_IO4passive
67PA8/LPTIM2_OUT/RCC_MCO/SAI1_SCK_A/SWPMI1_IO/TIM1_CH1/USART1_CKpassive
68PA9/DAC1_EXTI9/I2C1_SCL/SAI1_FS_A/~{TIM15_BKIN}/TIM1_CH2/USART1_TXpassive
69PA10/I2C1_SDA/SAI1_SD_A/TIM1_CH3/USART1_RXpassive
70PA11/ADC1_EXTI11/CAN1_RX/COMP1_OUT/SPI1_MISO/~{TIM1_BKIN2}/~{TIM1_BKIN2_COMP1}/TIM1_CH4/USART1_CTSpassive
71PA12/CAN1_TX/SPI1_MOSI/TIM1_ETR/USART1_DE/USART1_RTSpassive
72PA13_(JTMS-SWDIO)/IR_OUT/~{SAI1_SD_B}/SWPMI1_TX/SYS_JTMS-SWDIOpassive
73VDDpassive
74VSSpassive
75VDDpassive
76PA14_(JTCK-SWCLK)/I2C1_SMBA/LPTIM1_OUT/~{SAI1_FS_B}/SWPMI1_RX/SYS_JTCK-SWCLKpassive
77PA15_(JTDI)/ADC1/SPI1/SPI3/SWPMI1/SYS/TIM2/TSC/USART2/USART3passive
78PC10/SDMMC1_D2/SPI3_SCK/TSC_G3_IO2/USART3_TXpassive
79PC11/ADC1_EXTI11/SDMMC1_D3/SPI3_MISO/TSC_G3_IO3/USART3_RXpassive
80PC12/SDMMC1_CK/SPI3_MOSI/TSC_G3_IO4/USART3_CKpassive
81PD0/CAN1_RX/~{SPI2_NSS}passive
82PD1/CAN1_TX/SPI2_SCKpassive
83PD2/SDMMC1_CMD/TSC_SYNC/USART3_DE/USART3_RTSpassive
84PD3/~{QUADSPI_BK2_NCS}/SPI2_MISO/USART2_CTSpassive
85PD4/~{QUADSPI_BK2_IO0}/SPI2_MOSI/USART2_DE/USART2_RTSpassive
86PD5/~{QUADSPI_BK2_IO1}/USART2_TXpassive
87PD6/~{QUADSPI_BK2_IO2}/SAI1_SD_A/USART2_RXpassive
88PD7/~{QUADSPI_BK2_IO3}/USART2_CKpassive
89PB3_(JTDO-TRACESWO)/COMP2/SAI1/SPI1/SPI3/SYS/TIM2/USART1passive
90PB4_(NJTRST)/COMP2_INP/I2C3_SDA/~{SAI1_MCLK_B}/SPI1_MISO/SPI3_MISO/SYS_JTRST/TSC_G2_IO1/USART1_CTSpassive
91PB5/COMP2_OUT/I2C1_SMBA/LPTIM1_IN1/~{SAI1_SD_B}/SPI1_MOSI/SPI3_MOSI/~{TIM16_BKIN}/TSC_G2_IO2/USART1_CKpassive
92PB6/COMP2_INP/I2C1_SCL/LPTIM1_ETR/~{SAI1_FS_B}/TIM16_CH1N/TSC_G2_IO3/USART1_TXpassive
93PB7/COMP2_INM/I2C1_SDA/LPTIM1_IN2/SYS_PVD_IN/TSC_G2_IO4/USART1_RXpassive
94PH3-BOOT0passive
95PB8/CAN1_RX/I2C1_SCL/SAI1_MCLK_A/SDMMC1_D4/TIM16_CH1passive
96PB9/CAN1_TX/DAC1_EXTI9/I2C1_SDA/IR_OUT/SAI1_FS_A/SDMMC1_D5/~{SPI2_NSS}passive
97PE0/TIM16_CH1passive
98PE1passive
99VSSpassive
100VDDpassive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed