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ST MICROELECTRONICS STM32L4R9A(

celestial-altium-MCU_STM32

Symbol

169 pins
Schematic symbol for ST MICROELECTRONICS STM32L4R9A(
Units
8
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
A1PI10/OCTOSPIM_P2_IO1passive
A2PH2/OCTOSPIM_P1_IO4passive
A3VDDpassive
A4PE0/DCMI_D2/~{FMC_NBL0}/LTDC_HSYNC/TIM16_CH1/TIM4_ETRpassive
A5PB4_(NJTRST)/COMP2/DCMI/I2C3/SAI1/SPI1/SPI3/SYS/TIM17/TIM3/TSC/UART5/USART1passive
A6PB3_(JTDO/TRACESWO)/COMP2/CRS/SAI1/SPI1/SPI3/SYS/TIM2/USART1passive
A7VSSpassive
A8VDDpassive
A9PA15_(JTDI)/ADC1/SAI2/SPI1/SPI3/SYS/TIM2/TSC/UART4/USART2/USART3passive
B1PI9/CAN1_RX/DAC1_EXTI9/OCTOSPIM_P2_IO2passive
B2PI7/DCMI_D7/TIM8_CH3passive
B3VSSpassive
B4PE1/DCMI_D3/~{FMC_NBL1}/LTDC_VSYNC/TIM17_CH1passive
B5PB5/COMP2/DCMI/I2C1/LPTIM1/SAI1/SPI1/SPI3/TIM16/TIM3/TSC/UART5/USART1passive
B6VDDIO2passive
B7PG9/DAC1_EXTI9/~{FMC_NCE}/~{FMC_NE2}/OCTOSPIM_P2_IO6/SAI2_SCK_A/SPI3_SCK/TIM15_CH1N/USART1_TXpassive
B8PD0/CAN1_RX/DFSDM1_DATIN7/FMC_D2/FMC_DA2/~{LTDC_B4}/~{SPI2_NSS}passive
B9PI6/DCMI_D6/OCTOSPIM_P2_CLK/TIM8_CH2passive
C1VDDpassive
C2VSSpassive
C3PI11/ADC1_EXTI11/OCTOSPIM_P2_IO0passive
C4PB8/CAN1/DCMI/DFSDM1/I2C1/LTDC/SAI1/SDMMC1/TIM16/TIM4passive
C5PB6/COMP2/DCMI/DFSDM1/I2C1/I2C4/LPTIM1/SAI1/TIM16/TIM4/TIM8/TSC/USART1passive
C6PG15/ADC1_EXTI15/DCMI_D13/I2C1_SMBA/LPTIM1_OUT/OCTOSPIM_P2_DQSpassive
C7PD4/DFSDM1_CKIN0/~{FMC_NOE}/OCTOSPIM_P1_IO4/SPI2_MOSI/USART2_DE/USART2_RTSpassive
C8PD1/CAN1_TX/DFSDM1_CKIN7/FMC_D3/FMC_DA3/~{LTDC_B5}/SPI2_SCKpassive
C9PH13/CAN1_TX/TIM8_CH1Npassive
D1PE4/DCMI_D4/DFSDM1_DATIN3/FMC_A20/~{LTDC_B0}/SAI1_D2/SAI1_FS_A/SYS_TRACED1/TIM3_CH2/TSC_G7_IO3passive
D2PE3/FMC_A19/LTDC_R1/OCTOSPIM_P1_DQS/~{SAI1_SD_B}/SYS_TRACED0/TIM3_CH1/TSC_G7_IO2passive
D3PE2/FMC_A23/LTDC_R0/SAI1_CK1/SAI1_MCLK_A/SYS_TRACECLK/TIM3_ETR/TSC_G7_IO1passive
D4PB9/CAN1/DAC1/DCMI/DFSDM1/I2C1/IR/SAI1/SDMMC1/SPI2/TIM17/TIM4passive
D5PB7/COMP2/DCMI/DFSDM1/DSIHOST/FMC/I2C1/I2C4/LPTIM1/SYS/TIM17/TIM4/TIM8/TSC/UART4/USART1passive
D6PG10/~{FMC_NE3}/LPTIM1_IN1/OCTOSPIM_P2_IO7/SAI2_FS_A/SPI3_MISO/TIM15_CH1/USART1_RXpassive
D7PD5/~{FMC_NWE}/OCTOSPIM_P1_IO5/USART2_TXpassive
D8PD2/DCMI_D11/SDMMC1_CMD/SYS_TRACED2/TIM3_ETR/TSC_SYNC/UART5_RX/USART3_DE/USART3_RTSpassive
D9PC10/DCMI_D8/~{SAI2_SCK_B}/SDMMC1_D2/SPI3_SCK/SYS_TRACED1/TSC_G3_IO2/UART4_TX/USART3_TXpassive
E1PC13/RTC_OUT_ALARM/RTC_OUT_CALIB/RTC_TAMP1/RTC_TS/SYS_WKUP2passive
E2VBATpassive
E3PE6/DCMI_D7/FMC_A22/LTDC_G1/RTC_TAMP3/SAI1_D1/SAI1_SD_A/SYS_TRACED3/SYS_WKUP3/TIM3_CH4passive
E4PE5/DCMI_D6/DFSDM1_CKIN3/FMC_A21/LTDC_G0/SAI1_CK2/SAI1_SCK_A/SYS_TRACED2/TIM3_CH3/TSC_G7_IO4passive
E5PH3-BOOT0passive
E6PG11/ADC1_EXTI11/LPTIM1_IN2/OCTOSPIM_P1_IO5/SAI2_MCLK_A/SPI3_MOSI/TIM15_CH2/USART1_CTS/~{USART1_NSS}passive
E7PD6/DCMI_D10/DFSDM1_DATIN1/~{FMC_NWAIT}/LTDC_DE/OCTOSPIM_P1_IO6/SAI1_D1/SAI1_SD_A/SPI3_MOSI/USART2_RXpassive
E8PD3/DCMI_D5/DFSDM1_DATIN0/FMC_CLK/LTDC_CLK/~{OCTOSPIM_P2_NCS}/SPI2_MISO/SPI2_SCK/USART2_CTS/~{USART2_NSS}passive
E9PC11/ADC1/DCMI/OCTOSPIM/SAI2/SDMMC1/SPI3/TSC/UART4/USART3passive
F1PC14-OSC32_IN_(PC14)/RCC_OSC32_INpassive
F2VSSpassive
F3PF2/FMC_A2/I2C2_SMBA/OCTOSPIM_P2_IO2passive
F4PF1/FMC_A1/I2C2_SCL/OCTOSPIM_P2_IO1passive
F5PF0/FMC_A0/I2C2_SDA/OCTOSPIM_P2_IO0passive
F6PG12/~{FMC_NE4}/LPTIM1_ETR/~{OCTOSPIM_P2_NCS}/SAI2_SD_A/~{SPI3_NSS}/USART1_DE/USART1_RTSpassive
F7PD7/DFSDM1_CKIN1/~{FMC_NCE}/~{FMC_NE1}/OCTOSPIM_P1_IO7/USART2_CKpassive
F8PC12/DCMI_D9/~{SAI2_SD_B}/SDMMC1_CK/SPI3_MOSI/SYS_TRACED3/TSC_G3_IO4/UART5_TX/USART3_CKpassive
F9PC8/DCMI_D2/SDMMC1_D0/TIM3_CH3/TIM8_CH3/TSC_G4_IO3passive
G1PC15-OSC32_OUT_(PC15)/ADC1_EXTI15/RCC_OSC32_OUTpassive
G2VDDpassive
G3PF3/FMC_A3/OCTOSPIM_P2_IO3passive
G4PF4/FMC_A4/OCTOSPIM_P2_CLKpassive
G5PF5/FMC_A5passive
G6PG13/FMC_A24/I2C1_SDA/LTDC_R0/USART1_CKpassive
G7PG4/FMC_A14/~{SAI2_MCLK_B}/SPI1_MOSIpassive
G8PG3/FMC_A13/~{SAI2_FS_B}/SPI1_MISOpassive
G9PG5/FMC_A15/LPUART1_CTS/~{SAI2_SD_B}/~{SPI1_NSS}passive
H1PH0-OSC_IN_(PH0)/RCC_OSC_INpassive
H2VSSpassive
H3NRSTpassive
H4PF10/DCMI_D11/DFSDM1_CKOUT/OCTOSPIM_P1_CLK/SAI1_D3/TIM15_CH2passive
H5PG1/FMC_A11/OCTOSPIM_P2_IO5/TSC_G8_IO4passive
H6PE10/DFSDM1_DATIN4/FMC_D7/FMC_DA7/LTDC_G3/OCTOSPIM_P1_CLK/~{SAI1_MCLK_B}/TIM1_CH2N/TSC_G5_IO1passive
H7PB11/ADC1/COMP2/DFSDM1/DSIHOST/I2C2/I2C4/LPUART1/OCTOSPIM/TIM2/USART3passive
H8PD13/FMC_A18/I2C4_SDA/LPTIM2_OUT/TIM4_CH2/TSC_G6_IO4passive
H9PG2/FMC_A12/~{SAI2_SCK_B}/SPI1_SCKpassive
J1PH1-OSC_OUT_(PH1)/RCC_OSC_OUTpassive
J2PC0/ADC1_IN1/DFSDM1_DATIN4/I2C3_SCL/LPTIM1_IN1/LPTIM2_IN1/LPUART1_RX/SAI2_FS_Apassive
J3PC1/ADC1/DFSDM1/I2C3/LPTIM1/LPUART1/OCTOSPIM/SAI1/SPI2/SYSpassive
J4PC2/ADC1_IN3/DFSDM1_CKOUT/LPTIM1_IN2/OCTOSPIM_P1_IO5/SPI2_MISOpassive
J5PG0/FMC_A10/OCTOSPIM_P2_IO4/TSC_G8_IO3passive
J6PE9/DAC1_EXTI9/DFSDM1_CKOUT/FMC_D6/FMC_DA6/LTDC_G2/~{SAI1_FS_B}/TIM1_CH1passive
J7PE15/ADC1_EXTI15/FMC_D12/FMC_DA12/LTDC_R2/OCTOSPIM_P1_IO3/SPI1_MOSI/~{TIM1_BKIN}passive
J8PD12/FMC_A17/FMC_ALE/I2C4_SCL/LPTIM2_IN1/LTDC_R7/SAI2_FS_A/TIM4_CH1/TSC_G6_IO3/USART3_DE/USART3_RTSpassive
J9PD11/ADC1/FMC/I2C4/LPTIM2/LTDC/SAI2/TSC/USART3passive
K1PC3/ADC1_IN4/LPTIM1_ETR/LPTIM2_ETR/OCTOSPIM_P1_IO6/SAI1_D1/SAI1_SD_A/SPI2_MOSIpassive
K2VSSA/VREF-passive
K3PA0/ADC1/OPAMP1/RTC/SAI1/SYS/TIM2/TIM5/TIM8/UART4/USART2passive
K4PC4/ADC1_IN13/COMP1_INM/OCTOSPIM_P1_IO7/USART3_TXpassive
K5PF15/ADC1_EXTI15/FMC_A9/I2C4_SDA/LTDC_G1/TSC_G8_IO2passive
K6PE8/DFSDM1_CKIN2/FMC_D5/FMC_DA5/~{LTDC_B7}/~{SAI1_SCK_B}/TIM1_CH1Npassive
K7PE14/FMC_D11/FMC_DA11/LTDC_G7/OCTOSPIM_P1_IO2/SPI1_MISO/~{TIM1_BKIN2}/TIM1_CH4passive
K8PH4/I2C2_SCL/OCTOSPIM_P2_DQSpassive
K9PD9/DAC1_EXTI9/DCMI_PIXCLK/FMC_D14/FMC_DA14/LTDC_R4/SAI2_MCLK_A/USART3_RXpassive
L1VREF+/VREFBUF_OUTpassive
L2VDDApassive
L3PA5/ADC1_IN10/DAC1_OUT2/LPTIM2_ETR/SPI1_SCK/TIM2_CH1/TIM2_ETR/TIM8_CH1Npassive
L4PA6/ADC1/DCMI/LPUART1/OCTOSPIM/OPAMP2/SPI1/TIM16/TIM1/TIM3/TIM8/USART3passive
L5PB1/ADC1/COMP1/DFSDM1/LPTIM2/LPUART1/OCTOSPIM/TIM1/TIM3/TIM8/USART3passive
L6PF14/DFSDM1_CKIN6/FMC_A8/I2C4_SCL/LTDC_G0/TSC_G8_IO1passive
L7PE7/DFSDM1_DATIN2/FMC_D4/FMC_DA4/~{LTDC_B6}/~{SAI1_SD_B}/TIM1_ETRpassive
L8PE13/DFSDM1_CKIN5/FMC_D10/FMC_DA10/LTDC_G6/OCTOSPIM_P1_IO1/SPI1_SCK/TIM1_CH3/TSC_G5_IO4passive
L9PH5/DCMI_PIXCLK/I2C2_SDApassive
M1PA1/ADC1/I2C1/OCTOSPIM/OPAMP1/SPI1/TIM15/TIM2/TIM5/UART4/USART2passive
M2PA3/ADC1/LPUART1/OCTOSPIM/OPAMP1/SAI1/TIM15/TIM2/TIM5/USART2passive
M3VSSpassive
M4PA7/ADC1_IN12/I2C3_SCL/OCTOSPIM_P1_IO2/OPAMP2_VINM/SPI1_MOSI/TIM17_CH1/TIM1_CH1N/TIM3_CH2/TIM8_CH1Npassive
M5PF11/ADC1_EXTI11/DCMI_D12/DSIHOST_TE/LTDC_DEpassive
M6PF13/DFSDM1_DATIN6/FMC_A7/I2C4_SMBA/~{LTDC_B1}passive
M7VSSpassive
M8PE12/DFSDM1_DATIN5/FMC_D9/FMC_DA9/LTDC_G5/OCTOSPIM_P1_IO0/~{SPI1_NSS}/TIM1_CH3N/TSC_G5_IO3passive
M9PH10/DCMI_D1/OCTOSPIM_P2_IO5/TIM5_CH1passive
N1PA2/ADC1/LPUART1/OCTOSPIM/RCC/SAI2/SYS/TIM15/TIM2/TIM5/USART2passive
N2PA4/ADC1_IN9/DAC1_OUT1/DCMI_HSYNC/LPTIM2_OUT/~{OCTOSPIM_P1_NCS}/~{SAI1_FS_B}/~{SPI1_NSS}/~{SPI3_NSS}/USART2_CKpassive
N3VDDpassive
N4PB0/ADC1/COMP1/OCTOSPIM/OPAMP2/SAI1/SPI1/TIM1/TIM3/TIM8/USART3passive
N5PB2/COMP1_INP/DFSDM1_CKIN0/I2C3_SMBA/LPTIM1_OUT/~{LTDC_B1}/OCTOSPIM_P1_DQS/RTC_OUT_ALARM/RTC_OUT_CALIBpassive
N6PF12/FMC_A6/~{LTDC_B0}/OCTOSPIM_P2_DQSpassive
N7VDDpassive
N8PE11/ADC1_EXTI11/DFSDM1_CKIN4/FMC_D8/FMC_DA8/LTDC_G4/~{OCTOSPIM_P1_NCS}/TIM1_CH2/TSC_G5_IO2passive
N9PB10/COMP1/DFSDM1/I2C2/I2C4/LPUART1/OCTOSPIM/SAI1/SPI2/TIM2/TSC/USART3passive
A10PA14_(JTCK/I2C1_SMBA/I2C4_SMBA/LPTIM1_OUT/~{SAI1_FS_B}/SYS_JTCK-SWCLK/USB_OTG_FS_SOF/SWCLK)passive
A11PA13_(JTMS/IR_OUT/~{SAI1_SD_B}/SYS_JTMS-SWDIO/~{USB_OTG_FS_NOE}/SWDIO)passive
A12PI0/DCMI_D13/OCTOSPIM_P1_IO5/~{SPI2_NSS}/TIM5_CH4passive
A13PH14/DCMI_D4/TIM8_CH2Npassive
B10PI2/DCMI_D9/SPI2_MISO/TIM8_CH4passive
B11PI1/DCMI_D8/SPI2_SCKpassive
B12PH15/ADC1_EXTI15/DCMI_D11/OCTOSPIM_P2_IO6/TIM8_CH3Npassive
B13PH12/DCMI_D3/OCTOSPIM_P2_IO7/TIM5_CH3passive
C10PI3/DCMI_D10/SPI2_MOSI/TIM8_ETRpassive
C11PH9/DAC1_EXTI9/DCMI_D0/I2C3_SMBA/OCTOSPIM_P2_IO4passive
C12VSSpassive
C13VDDpassive
D10PI4/DCMI_D5/~{TIM8_BKIN}passive
D11PA10/DCMI_D1/SAI1_D1/SAI1_SD_A/~{TIM17_BKIN}/TIM1_CH3/USART1_RX/USB_OTG_FS_IDpassive
D12VDDUSBpassive
D13PA12/CAN1_TX/SPI1_MOSI/TIM1_ETR/USART1_DE/USART1_RTS/USB_OTG_FS_DPpassive
E10PI5/DCMI_VSYNC/~{OCTOSPIM_P2_NCS}/TIM8_CH1passive
E11PA8/LPTIM2_OUT/RCC_MCO/SAI1_CK2/SAI1_SCK_A/TIM1_CH1/USART1_CK/USB_OTG_FS_SOFpassive
E12PA9/DAC1_EXTI9/DCMI_D0/SAI1_FS_A/SPI2_SCK/~{TIM15_BKIN}/TIM1_CH2/USART1_TX/USB_OTG_FS_VBUSpassive
E13PA11/ADC1_EXTI11/CAN1_RX/SPI1_MISO/~{TIM1_BKIN2}/TIM1_CH4/USART1_CTS/~{USART1_NSS}/USB_OTG_FS_DMpassive
F10PG8/I2C3_SDA/LPUART1_RXpassive
F11PC6/DCMI_D0/DFSDM1_CKIN3/LTDC_R0/SAI2_MCLK_A/SDMMC1_D0DIR/SDMMC1_D6/TIM3_CH1/TIM8_CH1/TSC_G4_IO1passive
F12VDDIO2passive
F13VSSpassive
G10PG7/DFSDM1_CKOUT/FMC_INT/I2C3_SCL/LPUART1_TX/OCTOSPIM_P2_DQS/SAI1_CK1/SAI1_MCLK_Apassive
G11PC7/DCMI_D1/DFSDM1_DATIN3/LTDC_R1/~{SAI2_MCLK_B}/SDMMC1_D123DIR/SDMMC1_D7/TIM3_CH2/TIM8_CH2/TSC_G4_IO2passive
G12PG6/DSIHOST_TE/I2C3_SMBA/LPUART1_DE/LPUART1_RTS/LTDC_R1/OCTOSPIM_P1_DQSpassive
G13PC9/DAC1/DCMI/I2C3/SAI2/SDMMC1/SYS/TIM3/TIM8/TSC/USBpassive
H10PD15/ADC1_EXTI15/FMC_D1/FMC_DA1/~{LTDC_B3}/TIM4_CH4passive
H11PD14/FMC_D0/FMC_DA0/~{LTDC_B2}/TIM4_CH3passive
H12VSSpassive
H13VDDpassive
J10PD10/FMC_D15/FMC_DA15/LTDC_R5/SAI2_SCK_A/TSC_G6_IO1/USART3_CKpassive
J11DSIHOST_D1P/DSIHOST_D1Ppassive
J12DSIHOST_D1N/DSIHOST_D1Npassive
J13VSSDSIpassive
K10PD8/DCMI_HSYNC/FMC_D13/FMC_DA13/LTDC_R3/USART3_TXpassive
K11DSIHOST_CKP/DSIHOST_CKPpassive
K12DSIHOST_CKN/DSIHOST_CKNpassive
K13VSSDSIpassive
L10PB15/ADC1_EXTI15/DFSDM1_CKIN2/RTC_REFIN/SAI2_SD_A/SPI2_MOSI/TIM15_CH2/TIM1_CH3N/TIM8_CH3N/TSC_G1_IO4passive
L11DSIHOST_D0P/DSIHOST_D0Ppassive
L12DSIHOST_D0N/DSIHOST_D0Npassive
L13VCAPDSIpassive
M10PH11/ADC1_EXTI11/DCMI_D2/OCTOSPIM_P2_IO6/TIM5_CH2passive
M11VSSpassive
M12PB14/DFSDM1/I2C2/SAI2/SPI2/TIM15/TIM1/TIM8/TSC/USART3passive
M13VDDDSIpassive
N10PH8/DCMI_HSYNC/I2C3_SDA/OCTOSPIM_P2_IO3passive
N11VDDpassive
N12PB12/DFSDM1/I2C2/LPUART1/SAI2/SPI2/TIM15/TIM1/TSC/USART3passive
N13PB13/DFSDM1/I2C2/LPUART1/SAI2/SPI2/TIM15/TIM1/TSC/USART3passive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed