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ST MICROELECTRONICS STM32L552QE_2

celestial-altium-MCU_STM32

Symbol

132 pins
Schematic symbol for ST MICROELECTRONICS STM32L552QE_2
Units
6
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
A1PE5/DEBUG_TRACED2/DFSDM1_CKIN3/FMC_A21/SAI1_CK2/SAI1_SCK_A/TIM3_CH3/TSC_G7_IO4passive
A2PE3/DEBUG_TRACED0/FMC_A19/OCTOSPI1_DQS/~{SAI1_SD_B}/TIM3_CH1/TSC_G7_IO2passive
A3PE1/~{FMC_NBL1}/TIM17_CH1passive
A4PB9/DAC1/FDCAN1/I2C1/IR/SAI1/SDMMC1/SPI2/TIM17/TIM4passive
A5PB6/COMP2/I2C1/I2C4/LPTIM1/SAI1/TIM16/TIM4/TIM8/TSC/USART1passive
A6PG12/~{FMC_NE4}/LPTIM1_ETR/SAI2_SD_A/~{SPI3_NSS}/USART1_DE/USART1_RTSpassive
A7PD6/DFSDM1_DATIN1/~{FMC_NWAIT}/OCTOSPI1_IO6/SAI1_D1/SAI1_SD_A/SPI3_MOSI/USART2_RXpassive
A8PD5/~{FMC_NWE}/OCTOSPI1_IO5/USART2_TXpassive
A9PD2/DEBUG_TRACED2/SDMMC1_CMD/TIM3_ETR/TSC_SYNC/UART5_RX/USART3_DE/USART3_RTSpassive
B1VBATpassive
B2PE4/DEBUG_TRACED1/DFSDM1_DATIN3/FMC_A20/SAI1_D2/SAI1_FS_A/TIM3_CH2/TSC_G7_IO3passive
B3PE2/DEBUG_TRACECLK/FMC_A23/SAI1_CK1/SAI1_MCLK_A/TIM3_ETR/TSC_G7_IO1passive
B4VDD12passive
B5PH3-BOOT0passive
B6PB4_(NJTRST)/COMP2/DEBUG/I2C3/SAI1/SPI1/SPI3/TIM17/TIM3/TSC/UART5/USART1passive
B7PG9/DAC1_EXTI9/~{FMC_NCE}/~{FMC_NE2}/SAI2_SCK_A/SPI3_SCK/TIM15_CH1N/USART1_TXpassive
B8PD4/DFSDM1_CKIN0/~{FMC_NOE}/OCTOSPI1_IO4/SPI2_MOSI/USART2_DE/USART2_RTSpassive
B9PD1/FDCAN1_TX/FMC_D3/FMC_DA3/SPI2_SCKpassive
C1PC14-OSC32_IN_(PC14)/RCC_OSC32_INpassive
C2PE6/DEBUG_TRACED3/FMC_A22/PWR_WKUP3/SAI1_D1/SAI1_SD_A/TAMP_IN3/TAMP_OUT6/TIM3_CH4passive
C3PC13/PWR_WKUP2/RTC_OUT1/RTC_TS/TAMP_IN1/TAMP_OUT2passive
C4PE0/~{FMC_NBL0}/TIM16_CH1/TIM4_ETRpassive
C5PB8/DFSDM1_CKOUT/FDCAN1_RX/I2C1_SCL/SAI1_CK1/SAI1_MCLK_A/SDMMC1_CKIN/SDMMC1_D4/TIM16_CH1/TIM4_CH3passive
C6PB3_(JTDO/TRACESWO)/COMP2/CRS/DEBUG/SAI1/SPI1/SPI3/TIM2/USART1passive
C7PG10/~{FMC_NE3}/LPTIM1_IN1/SAI2_FS_A/SPI3_MISO/TIM15_CH1/USART1_RXpassive
C8PD3/DFSDM1_DATIN0/FMC_CLK/SPI2_MISO/SPI2_SCK/USART2_CTS/~{USART2_NSS}passive
C9PD0/FDCAN1_RX/FMC_D2/FMC_DA2/~{SPI2_NSS}passive
D1PC15-OSC32_OUT_(PC15)/ADC1_EXTI15/ADC2_EXTI15/RCC_OSC32_OUTpassive
D2PF0/FMC_A0/I2C2_SDApassive
D3PF3/FMC_A3/LPTIM3_IN1passive
D4VDDpassive
D5PB7/COMP2/FMC/I2C1/I2C4/LPTIM1/PWR/TIM17/TIM4/TIM8/TSC/UART4/USART1passive
D6PB5/COMP2/I2C1/LPTIM1/OCTOSPI1/SAI1/SPI1/SPI3/TIM16/TIM3/TSC/UART5/UCPD1/USART1passive
D7PD7/DFSDM1_CKIN1/~{FMC_NCE}/~{FMC_NE1}/OCTOSPI1_IO7/USART2_CKpassive
D8VDDIO2passive
D9VDDpassive
E1PF2/FMC_A2/I2C2_SMBApassive
E2PF1/FMC_A1/I2C2_SCLpassive
E3PF4/FMC_A4/LPTIM3_ETRpassive
E4VSSpassive
E9VSSpassive
F1PH0-OSC_IN_(PH0)/RCC_OSC_INpassive
F2PF5/FMC_A5/LPTIM3_OUTpassive
F3PC2/ADC1_IN3/ADC2_IN3/DFSDM1_CKOUT/LPTIM1_IN2/OCTOSPI1_IO5/SPI2_MISOpassive
F4PC3/ADC1_IN4/ADC2_IN4/LPTIM1_ETR/LPTIM2_ETR/LPTIM3_OUT/OCTOSPI1_IO6/SAI1_D1/SAI1_SD_A/SPI2_MOSIpassive
F6VSSpassive
F7VDDpassive
F9PG6/I2C3_SMBA/LPUART1_DE/LPUART1_RTS/OCTOSPI1_DQS/UCPD1_FRSTX1passive
G1PH1-OSC_OUT_(PH1)/RCC_OSC_OUTpassive
G2NRSTpassive
G3PC1/ADC1_IN2/ADC2_IN2/DEBUG_TRACED0/I2C3_SDA/LPTIM1_OUT/LPUART1_TX/OCTOSPI1_IO4/SAI1_SD_A/SPI2_MOSIpassive
G4PA1/ADC1/ADC2/I2C1/OCTOSPI1/OPAMP1/SPI1/TAMP/TIM15/TIM2/TIM5/UART4/USART2passive
G6VDDpassive
G7VSSpassive
G9PG4/FMC_A14/~{SAI2_MCLK_B}/SPI1_MOSIpassive
H1VSSA/VREF-passive
H2PC0/ADC1_IN1/ADC2_IN1/I2C3_SCL/LPTIM1_IN1/LPTIM2_IN1/LPUART1_RX/OCTOSPI1_IO7/SAI2_FS_A/SDMMC1_D5passive
H3OPAMP1_VINM/OPAMP1_VINMpassive
H4VSSpassive
H9VSSpassive
J1VREF+passive
J2PA0/ADC1/ADC2/OPAMP1/PWR/SAI1/TAMP/TIM2/TIM5/TIM8/UART4/USART2passive
J3PC5/ADC1_IN14/ADC2_IN14/COMP1_INP/PWR_WKUP5/SAI1_D3/TAMP_IN4/TAMP_OUT5/USART3_RXpassive
J4VDDpassive
J5PF14/FMC_A8/I2C4_SCL/TSC_G8_IO1passive
J6PE8/DFSDM1_CKIN2/FMC_D5/FMC_DA5/~{SAI1_SCK_B}/TIM1_CH1Npassive
J7PE10/FMC_D7/FMC_DA7/OCTOSPI1_CLK/~{SAI1_MCLK_B}/TIM1_CH2N/TSC_G5_IO1passive
J8PE12/FMC_D9/FMC_DA9/OCTOSPI1_IO0/~{SPI1_NSS}/TIM1_CH3N/TSC_G5_IO3passive
J9VDDpassive
K1VDDApassive
K2PA2/ADC1/ADC2/COMP1/LPUART1/OCTOSPI1/PWR/RCC/SAI2/TIM15/TIM2/TIM5/UCPD1/USART2passive
K3PA7/ADC1/ADC2/I2C3/OCTOSPI1/OPAMP2/SPI1/TIM17/TIM1/TIM3/TIM8passive
K4PB2/COMP1_INP/DFSDM1_CKIN0/I2C3_SMBA/LPTIM1_OUT/OCTOSPI1_DQS/RTC_OUT2/UCPD1_FRSTX1passive
K5PF11/ADC1_EXTI11/ADC2_EXTI11/~{OCTOSPI1_NCLK}passive
K6PG1/FMC_A11/TSC_G8_IO4passive
K7PE7/DFSDM1_DATIN2/FMC_D4/FMC_DA4/~{SAI1_SD_B}/TIM1_ETRpassive
K8PE14/FMC_D11/FMC_DA11/OCTOSPI1_IO2/SPI1_MISO/~{TIM1_BKIN2}/TIM1_CH4passive
K9PB10/COMP1/I2C2/I2C4/LPTIM3/LPUART1/OCTOSPI1/SAI1/SPI2/TIM2/TSC/USART3passive
L1PA3/ADC1/ADC2/LPUART1/OCTOSPI1/OPAMP1/SAI1/TIM15/TIM2/TIM5/USART2passive
L2PA6/ADC1/ADC2/LPUART1/OCTOSPI1/OPAMP2/SPI1/TIM16/TIM1/TIM3/TIM8/USART3passive
L3PA4/ADC1_IN9/ADC2_IN9/DAC1_OUT1/LPTIM2_OUT/~{OCTOSPI1_NCS}/~{SAI1_FS_B}/~{SPI1_NSS}/~{SPI3_NSS}/USART2_CKpassive
L4PB1/ADC1/ADC2/COMP1/DFSDM1/LPTIM2/LPUART1/OCTOSPI1/TIM1/TIM3/TIM8/USART3passive
L5PF12/FMC_A6passive
L6PF15/ADC1_EXTI15/ADC2_EXTI15/FMC_A9/I2C4_SDA/TSC_G8_IO2passive
L7PE11/ADC1_EXTI11/ADC2_EXTI11/FMC_D8/FMC_DA8/~{OCTOSPI1_NCS}/TIM1_CH2/TSC_G5_IO2passive
L8PE15/ADC1_EXTI15/ADC2_EXTI15/FMC_D12/FMC_DA12/OCTOSPI1_IO3/SPI1_MOSI/~{TIM1_BKIN}passive
L9PB11/ADC1_EXTI11/ADC2_EXTI11/COMP2_OUT/I2C2_SDA/I2C4_SDA/LPUART1_TX/~{OCTOSPI1_NCS}/TIM2_CH4/USART3_RXpassive
M1PA5/ADC1_IN10/ADC2_IN10/DAC1_OUT2/LPTIM2_ETR/SPI1_SCK/TIM2_CH1/TIM2_ETR/TIM8_CH1Npassive
M2OPAMP2_VINM/OPAMP2_VINMpassive
M3PC4/ADC1_IN13/ADC2_IN13/COMP1_INM/OCTOSPI1_IO7/USART3_TXpassive
M4PB0/ADC1/ADC2/COMP1/OCTOSPI1/OPAMP2/SAI1/SPI1/TIM1/TIM3/TIM8/USART3passive
M5PF13/FMC_A7/I2C4_SMBApassive
M6PG0/FMC_A10/TSC_G8_IO3passive
M7PE9/DAC1_EXTI9/DFSDM1_CKOUT/FMC_D6/FMC_DA6/~{OCTOSPI1_NCLK}/~{SAI1_FS_B}/TIM1_CH1passive
M8PE13/FMC_D10/FMC_DA10/OCTOSPI1_IO1/SPI1_SCK/TIM1_CH3/TSC_G5_IO4passive
M9PG14/FMC_A25/I2C1_SCLpassive
A10PC11/ADC1/ADC2/LPTIM3/OCTOSPI1/SAI2/SDMMC1/SPI3/TSC/UART4/UCPD1/USART3passive
A11PA15_(JTDI)/ADC1/ADC2/DEBUG/SAI2/SPI1/SPI3/TIM2/UART4/UCPD1/USART2/USART3passive
A12VDDUSBpassive
B10PC12/DEBUG_TRACED3/~{SAI2_SD_B}/SDMMC1_CK/SPI3_MOSI/TSC_G3_IO4/UART5_TX/USART3_CKpassive
B11PC10/DEBUG_TRACED1/LPTIM3_ETR/~{SAI2_SCK_B}/SDMMC1_D2/SPI3_SCK/TSC_G3_IO2/UART4_TX/USART3_TXpassive
B12PA12/FDCAN1_TX/SPI1_MOSI/TIM1_ETR/USART1_DE/USART1_RTS/USB_DPpassive
C10PA13_(JTMS/DEBUG_JTMS-SWDIO/IR_OUT/~{SAI1_SD_B}/~{USB_NOE}/SWDIO)passive
C11PA14_(JTCK/DEBUG_JTCK-SWCLK/I2C1_SMBA/I2C4_SMBA/LPTIM1_OUT/~{SAI1_FS_B}/SWCLK)passive
C12PA11/ADC1_EXTI11/ADC2_EXTI11/FDCAN1_RX/SPI1_MISO/~{TIM1_BKIN2}/TIM1_CH4/USART1_CTS/~{USART1_NSS}/USB_DMpassive
D10PA9/DAC1_EXTI9/SAI1_FS_A/SPI2_SCK/~{TIM15_BKIN}/TIM1_CH2/USART1_TXpassive
D11PA10/CRS_SYNC/SAI1_D1/SAI1_SD_A/~{TIM17_BKIN}/TIM1_CH3/USART1_RXpassive
D12PA8/LPTIM2_OUT/RCC_MCO/SAI1_CK2/SAI1_SCK_A/TIM1_CH1/USART1_CKpassive
E10PC7/DFSDM1_DATIN3/~{SAI2_MCLK_B}/SDMMC1_D123DIR/SDMMC1_D7/TIM3_CH2/TIM8_CH2/TSC_G4_IO2passive
E11PC9/DAC1_EXTI9/DEBUG_TRACED0/SAI2_EXTCLK/SDMMC1_D1/TIM3_CH4/~{TIM8_BKIN2}/TIM8_CH4/TSC_G4_IO4/~{USB_NOE}passive
E12PC8/SDMMC1_D0/TIM3_CH3/TIM8_CH3/TSC_G4_IO3passive
F10PG7/DFSDM1_CKOUT/FMC_INT/I2C3_SCL/LPUART1_TX/SAI1_CK1/SAI1_MCLK_A/UCPD1_FRSTX2passive
F11PC6/DFSDM1_CKIN3/SAI2_MCLK_A/SDMMC1_D0DIR/SDMMC1_D6/TIM3_CH1/TIM8_CH1/TSC_G4_IO1passive
F12PG8/I2C3_SDA/LPUART1_RXpassive
G10PG2/FMC_A12/~{SAI2_SCK_B}/SPI1_SCKpassive
G11PG3/FMC_A13/~{SAI2_FS_B}/SPI1_MISOpassive
G12PG5/FMC_A15/LPUART1_CTS/~{SAI2_SD_B}/~{SPI1_NSS}passive
H10PD14/FMC_D0/FMC_DA0/TIM4_CH3passive
H11PD13/FMC_A18/I2C4_SDA/LPTIM2_OUT/TIM4_CH2/TSC_G6_IO4passive
H12PD15/ADC1_EXTI15/ADC2_EXTI15/FMC_D1/FMC_DA1/TIM4_CH4passive
J10PD9/DAC1_EXTI9/FMC_D14/FMC_DA14/SAI2_MCLK_A/USART3_RXpassive
J11PD11/ADC1/ADC2/FMC/I2C4/LPTIM2/SAI2/TSC/USART3passive
J12PD12/FMC_A17/FMC_ALE/I2C4_SCL/LPTIM2_IN1/SAI2_FS_A/TIM4_CH1/TSC_G6_IO3/USART3_DE/USART3_RTSpassive
K10PB13/DFSDM1/I2C2/LPTIM3/LPUART1/SAI2/SPI2/TIM15/TIM1/TSC/UCPD1/USART3passive
K11PB14/DFSDM1/I2C2/LPTIM3/SAI2/SPI2/TIM15/TIM1/TIM8/TSC/UCPD1/USART3passive
K12PB15/ADC1/ADC2/DFSDM1/RTC/SAI2/SPI2/TIM15/TIM1/TIM8/UCPD1passive
L10VSSpassive
L11PB12/DFSDM1/I2C2/LPUART1/OCTOSPI1/SAI2/SPI2/TIM15/TIM1/TSC/USART3passive
L12PD8/FMC_D13/FMC_DA13/USART3_TXpassive
M10PG13/FMC_A24/I2C1_SDA/USART1_CKpassive
M11VDD12passive
M12PD10/FMC_D15/FMC_DA15/SAI2_SCK_A/TSC_G6_IO1/USART3_CKpassive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed