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ST MICROELECTRONICS STM32N655B0

celestial-altium-MCU_STM32

Symbol

195 pins
Schematic symbol for ST MICROELECTRONICS STM32N655B0
Units
7
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
A1PDR_ONpassive
A2OTG2_HSDP/USB2_OTG_HS_DPpassive
A4OTG1_HSDP/USB1_OTG_HS_DPpassive
A5PH0-OSC_IN(PH0)/RCC_OSC_INpassive
A6PC10/DCMIPP/FMC/HDP/I2C4/I2S3/I3C2/PSSI/SDMMC1/SPI3/TIM1/UART4/USART3passive
A7PC7/DCMIPP/DCMI/DEBUG/HDP/I2S3/PSSI/SDMMC1/TIM16/TIM3/TIM9/USART6passive
A8PE11/ADC1_EXTI11/ADC2_EXTI11/FDCAN3_TX/FMC_SDNWE/LTDC_VSYNC/MDF1_CKI5/~{SAI2_SD_B}/SPI4_NSS/TIM1_CH2passive
A9PE15/ADC1/ADC2/FMC/GFXTIM/I2C4/SDMMC1/SPI5/TIM1/USART2passive
B1PC15-OSC32_OUT(OSC32_OUT)/ADC1_EXTI15/ADC2_EXTI15/RCC_OSC32_OUTpassive
B2OTG2_HSDM/USB2_OTG_HS_DMpassive
B3VDD33USBpassive
B4OTG1_HSDM/USB1_OTG_HS_DMpassive
B5PH1-OSC_OUT(PH1)/RCC_OSC_OUTpassive
B6PC9/AUDIOCLK/DCMIPP/DCMI/HDP/I2C3/LTDC/PSSI/RCC/SDMMC1/TIM3/UART5/UCPD1/USART6passive
B7PC6/DCMIPP/DCMI/HDP/I2S2/PSSI/SDMMC1/TIM1/TIM3/TIM9/USART6passive
B8PE14/ADF1_CCK1/FMC_NWE/FMC_SDNE0/GFXTIM_FCKCAL/GFXTIM_LCKCAL/I2C4_SDA/~{SAI2_MCLK_B}/SPI4_MOSI/TIM1_CH4passive
B9PE13/ADF1_CCK0/FMC_SDNCAS/I2C4_SCL/~{SAI2_FS_B}/SPI4_MISO/TIM1_CH3passive
C1PC14-OSC32_IN(OSC32_IN)/RCC_OSC32_INpassive
C3VDDA18USBpassive
C4OTG1_ID/USB1_OTG_HS_IDpassive
C5OTG1_TXRTUNEpassive
C6PC8/DCMIPP/DCMI/DEBUG/FMC/HDP/I2C3/LTDC/PSSI/SDMMC1/TIM3/UART5/UCPD1/USART6passive
C7PC1/DCMIPP/DCMI/FDCAN1/HDP/I2C1/I2S2/I3C1/PSSI/SDMMC1/SPI2/TIM17/TIM4/UART4passive
C8PE5/DCMIPP/DCMI/FDCAN2/FMC/HDP/I2C1/I3C1/LPUART1/PSSI/TIM16/TIM4/UART5/USART1passive
C9PE12/FDCAN3_RX/FMC_SDNRAS/MDF1_SDI5/~{SAI2_SCK_B}/SPI4_SCK/TIM1_CH3Npassive
D1VBATpassive
D2OTG2_ID/USB2_OTG_HS_IDpassive
D3OTG2_TXRTUNEpassive
D4UCPD1_CC1passive
D5UCPD1_CC2passive
D6PC11/ADC1/ADC2/DCMIPP/DCMI/HDP/I2C4/I2S3/I3C2/PSSI/SDMMC1/SPI3/UART4/USART3passive
D7PH9/DCMIPP/DCMI/FDCAN1/FMC/HDP/I2C1/I3C1/PSSI/SDMMC1/TIM16/TIM4/UART4/USART3passive
D8PE6/DCMIPP/DCMI/FMC/HDP/I2C1/I3C1/LPUART1/PSSI/TIM17/TIM4/UART5/USART1passive
D9PD2/ADF1/DEBUG/FMC/HDP/I2S2/MDF1/MDIOS/PWR/SAI1/SPI2/TIM15/TIM1passive
E1V08CAPpassive
E2VFBSMPSpassive
E3BOOT0passive
E4NRSTpassive
E5VDDA18AONpassive
E6PC12/DCMIPP/DCMI/DEBUG/FMC/HDP/I2S3/I2S6/PSSI/SDMMC1/SPI3/SPI6/TIM15/TIM1/UART5/USART3passive
E7PH2/DCMIPP/DCMI/DEBUG/FDCAN1/FMC/PSSI/SDMMC1/TIM15/TIM1/TIM3/UART5passive
E8VSSpassive
E9VDDIO4passive
F1VDDA18PMUpassive
F2VSSAPMUpassive
F3PWR_ONpassive
F4PC13/HDP_HDP5/PWR_WKUP3/RTC_OUT1/RTC_TS/TAMP_IN1/TAMP_OUT2passive
F5VSSAONpassive
G1VSSSMPSpassive
G2VSSSMPSpassive
G3VSSSMPSpassive
G4VSSSMPSpassive
H1VLXSMPSpassive
H2VLXSMPSpassive
H3VLXSMPSpassive
H4VLXSMPSpassive
J1VDDSMPSpassive
J2VDDSMPSpassive
J3VDDSMPSpassive
J4VDDSMPSpassive
J5VDDA18PLLpassive
K1PF4/ADC1/DCMIPP/DCMI/ETH1/HDP/I2S1/I2S3/I2S6/LPTIM3/LTDC/PSSI/SPI1/SPI3/SPI6/TIM5/USART2passive
K2PF6/ADC1/ADC2/ETH1/GFXTIM/HDP/I2S6/LPTIM3/LTDC/SPI1/SPI4/SPI5/TIM15/TIM1/TIM2/TIM5/USART2passive
K3PF10/DCMIPP/DCMI/ETH1/LTDC/MDF1/PSSI/SAI1/TIM16/UART7/UCPD1passive
K4PG6/DCMIPP_D12/DCMI_D12/ETH1_MII_CRS/LTDC_B3/PSSI_D12/TIM17_BKIN/USART6_CKpassive
K5PG5/ETH1_MII_RX_ER/LTDC_B1/TIM1_ETR/USART2_CTS/USART2_NSSpassive
L1PF5/DCMIPP/DCMI/ETH1/FMC/LPTIM2/LTDC/PSSI/SAI2/TIM1/USART3passive
L2PF3/ADC1_INP16/DCMIPP_HSYNC/DCMI_HSYNC/ETH1_PPS_OUT/FDCAN3_RX/FMC_NL/LTDC_R4/PSSI_DE/USART2_RTSpassive
L3PF2/ETH1_RGMII_CLK125/FDCAN3_TX/FMC_NWAIT/I2S2_CK/LTDC_B1/SPI2_SCK/TIM1_CH3N/USART2_CTS/USART2_NSSpassive
L4PF14/ADC2/ETH1/LTDC/SPI5/TIM2/USART1passive
L5VSSpassive
L6VDDCOREpassive
L7VDDCOREpassive
L8VDDCOREpassive
L9VDDCOREpassive
M1PF15/ADC1/ADC2/ETH1/LTDC/SPI5/USART1passive
M2PF7/ADC1/ADC2/ETH1/GFXTIM/HDP/I2S1/LTDC/SPI1/TIM1/TIM3/TIM9/UART4passive
M3PF8/DEBUG_TRACECLK/ETH1_MII_RXD2/ETH1_RGMII_RXD2/FMC_NWE/LTDC_R6/UART9_TXpassive
M4PF9/DEBUG_TRACED0/ETH1_MII_RXD3/ETH1_RGMII_RXD3/LTDC_HSYNCpassive
M5VSSApassive
M6VDDA18ADCpassive
M7PG15/ADC1/ADC2/DCMIPP/DCMI/ETH1/FMC/LTDC/PSSI/SPI1/SPI4/SPI5/TIM1/USART3passive
M8PG14/DCMIPP/DCMI/DEBUG/FMC/I2S6/LPTIM1/LTDC/PSSI/SPI6/USART2/USART6passive
M9PA9/ADC1/ADC2/DCMIPP/DCMI/FMC/HDP/I2C3/I2S2/I3C2/LPUART1/LTDC/PSSI/SPI2/TIM1/USART1passive
N1PF11/ADC1/ADC2/DCMIPP/ETH1/LTDC/PSSI/SAI2/SPI5passive
N2PF1/DCMIPP/DCMI/ETH1/LPTIM1/LPTIM2/PSSI/TIM4/UART8/UART9/UCPD1passive
N3PF12/ADC1/DCMIPP/DCMI/ETH1/PSSI/SPI5/USART1passive
N4PF0/DCMIPP/DCMI/ETH1/LPTIM5/PSSI/TIM4/UART8/UART9/UCPD1passive
N5CSI_REXTpassive
N6VDDCSIpassive
N7PA12/ADC1/ADC2/FDCAN1/FMC/HDP/I2S2/LPUART1/LTDC/SAI2/SPI2/TIM1/UART4/USART1passive
N8PA11/ADC1/ADC2/FDCAN1/FMC/HDP/I2S2/LPUART1/LTDC/SPI2/TIM1/UART4/USART1passive
N9PA8/ADC1/ADC2/FMC/HDP/I2C3/I3C2/LTDC/RCC/TIM11/TIM1/UART7/USART1passive
P1PF13/ADC2/DCMIPP/DCMI/ETH1/PSSI/SPI5/USART1passive
P2PG4/ETH1_MII_TXD3/ETH1_RGMII_TXD3/LTDC_B0/TIM1_BKIN2passive
P3VREF-passive
P4CSI_D1Npassive
P5CSI_CKNpassive
P6CSI_D0Npassive
P7VDDA18CSIpassive
P8PA10/ADC1/ADC2/DCMIPP/DCMI/FMC/HDP/LPUART1/LTDC/MDIOS/PSSI/PWR/TIM1/USART1passive
P9PA2/ADC1/ADC2/FMC/HDP/LPTIM3/LTDC/MDIOS/PWR/SAI2/TIM15/TIM2/TIM5/USART2passive
R1VSSpassive
R2PG3/DCMIPP_HSYNC/DCMI_HSYNC/DEBUG_TRACED1/ETH1_MII_TXD2/ETH1_RGMII_TXD2/PSSI_DE/USART2_TXpassive
R3VREF+passive
R4CSI_D1Ppassive
R5CSI_CKPpassive
R6CSI_D0Ppassive
R7PA14(JTCK/DEBUG_JTCK-SWCLK/HDP_HDP6/SWCLK)passive
R8PA13(JTMS/DEBUG_JTMS-SWDIO/HDP_HDP5/SWDIO)passive
R9PA5/ADC2/DCMIPP/DCMI/FMC/HDP/I2S1/I2S6/I3C1/LTDC/PSSI/PWR/SPI1/SPI6/TIM10/TIM2/TIM9passive
A10PD6/FMC_A1/FMC_A17/FMC_ALE/HDP_HDP2/I2S2_SDI/SPI2_MISO/TIM15_CH2/TIM1_CH1passive
A11PD12/DCMIPP_D12/DCMI_D12/ETH1_MDIO/FMC_A5/FMC_A21/HDP_HDP5/MDF1_SDI3/PSSI_D12/SAI1_D3/UCPD1_FRSTX2passive
A12PD3/DCMIPP_D14/ETH1_PHY_INTN/FMC_A10/I2C2_SMBA/PSSI_D14/USART6_CTSpassive
A13PE10/DCMIPP/DCMI/DEBUG/FMC/MDF1/PSSI/TIM1/UART7/USART3passive
A14PB3/DEBUG/FMC/GFXTIM/HDP/MDF1/SAI2/TIM1/USART1passive
A15VSSpassive
B10PD7/DCMIPP/DCMI/FMC/HDP/I2S2/I2S3/PSSI/SPI2/SPI3/TIM15/TIM1passive
B11PD1/ETH1_MDC/FDCAN1_TX/FMC_A7/FMC_A23/UART4_TXpassive
B12PD4/DCMIPP_D9/DCMI_D9/FMC_A11/I2C2_SDA/PSSI_D9/SPI5_MISO/TAMP_IN7/TAMP_OUT8/TIM1_BKIN2/USART6_RTSpassive
B13PD8/DCMIPP_D11/DCMI_D11/FMC_NBL0/LTDC_R7/PSSI_D11/TAMP_IN3/TAMP_OUT4/USART3_TXpassive
B14PD11/ADC1/ADC2/DCMIPP/FMC/I2C4/I2S2/PSSI/SDMMC1/SPI2/UCPD1passive
B15PE2/ADF1/DEBUG/FMC/LPTIM5/MDF1/SAI1/SPI4/TIM1/UCPD1passive
C10PD10/DEBUG/FMC/GFXTIM/HDP/I2S1/MDF1/SAI2/TIM1/UCPD1passive
C11PD0/DCMIPP_HSYNC/DCMI_HSYNC/FDCAN1_RX/FMC_A6/FMC_A22/PSSI_DE/TIM1_ETR/UART4_RX/UART9_CTSpassive
C12PE8/DCMIPP_D4/DCMI_D4/FMC_A12/MDF1_SDI0/PSSI_D4/TIM1_CH1N/UART7_TX/USART3_TXpassive
C13PD5/DCMIPP_PIXCLK/DCMI_PIXCLK/FMC_D6/FMC_DA6/PSSI_PDCK/TIM1_CH4N/USART2_TXpassive
C14PE0/DCMIPP/DCMI/FMC/LPTIM1/LPTIM2/PSSI/SAI2/TAMP/TIM4/UART8/USART3passive
C15PE3/DEBUG_TRACED0/FMC_D12/FMC_DA12/LPTIM5_ETR/MDF1_CKI2/~{SAI1_SD_B}/TIM15_BKINpassive
D10PE7/FMC_A4/FMC_A20/MDF1_CKI0/~{SAI2_SD_B}/TIM1_ETR/UART7_RXpassive
D11PD15/ADC1_EXTI15/ADC2_EXTI15/FMC_A8/I2C2_SDA/LTDC_R2passive
D12PE9/FMC_A14/FMC_BA0/MDF1_CKI4/TIM1_CH1/UART7_RTSpassive
D13PE1/DCMIPP_D8/DCMI_D8/FMC_D10/FMC_DA10/LPTIM1_IN2/LPTIM2_CH2/PSSI_D8/UART8_TX/USART3_TXpassive
D14PB6/ADF1/DCMIPP/DCMI/DEBUG/FMC/MDF1/PSSI/SAI1/SPI4/TIM15passive
D15PB0/ADF1/DCMIPP/DCMI/DEBUG/FMC/MDF1/PSSI/SAI1/SPI4/TIM15/TIM1passive
E10VDDIO4passive
E11PD14/FMC_A9/I2C2_SCLpassive
E12PB7/ADF1/DCMIPP/DCMI/DEBUG/FMC/MDF1/PSSI/SAI1/SAI2/SPI4/TIM15/TIM1passive
E13PD9/DCMIPP_D11/DCMI_D11/FMC_SDCLK/LTDC_R1/PSSI_D11/TAMP_IN5/TAMP_OUT6/USART3_RXpassive
E14PP2/FMC_D18/XSPIM_P1_IO2passive
E15PP4/FMC_D20/XSPIM_P1_IO4passive
F12PO1/FMC_A23/XSPIM_P1_NCS2passive
F13PP3/FMC_D19/XSPIM_P1_IO3passive
F14PO5/FMC_A25/FMC_NBL3/XSPIM_P1_NCLKpassive
F15PO4/FMC_A24/FMC_NBL2/LTDC_B4/XSPIM_P1_CLKpassive
G11VSSpassive
G12PO0/FMC_A22/XSPIM_P1_NCS1passive
G13PP6/FMC_D22/XSPIM_P1_IO6passive
G14PP0/FMC_D16/XSPIM_P1_IO0passive
G15PP5/FMC_D21/XSPIM_P1_IO5passive
H11VDDpassive
H12VDDpassive
H13PP1/FMC_D17/XSPIM_P1_IO1passive
H14PP7/FMC_D23/XSPIM_P1_IO7passive
H15PO2/FMC_A24/LTDC_B7/XSPIM_P1_DQS0passive
J11VDDIO2passive
J12VDDIO2passive
J13VDDpassive
J14PN4/XSPIM_P2_IO2passive
J15PN8/XSPIM_P2_IO4passive
K11VDDIO3passive
K12PN1/FMC_A24/XSPIM_P2_NCS1passive
K13PN5/XSPIM_P2_IO3passive
K14PN7/XSPIM_P2_NCLKpassive
K15PN6/XSPIM_P2_CLKpassive
L10VSSpassive
L11VDDIO3passive
L12PN12/XSPIM_P2_NCS2passive
L13PN9/DCMIPP_D5/DCMI_D5/PSSI_D5/XSPIM_P2_IO5passive
L14PN2/FMC_A23/XSPIM_P2_IO0passive
L15PN10/LTDC_B4/XSPIM_P2_IO6passive
M10PA6/BOOT1/ADC1/ADC2/DCMIPP/DCMI/HDP/I2S1/I2S6/I3C1/LPTIM3/LTDC/MDIOS/PSSI/SPI1/SPI6/TIM13/TIM1/TIM3passive
M11PA1/ADC1/ADC2/DCMIPP/DCMI/FMC/HDP/LPTIM3/LTDC/PSSI/SAI2/TIM15/TIM2/TIM5/UART4/USART2passive
M12PB11/ADC1/ADC2/FMC/HDP/I2C2/I3C2/LPTIM2/LTDC/TIM2/USART3passive
M13PN0/FMC_A25/XSPIM_P2_DQS0passive
M14PN11/ADC1_EXTI11/ADC2_EXTI11/LTDC_B6/XSPIM_P2_IO7passive
M15PN3/FMC_A22/XSPIM_P2_IO1passive
N10PG13/DCMIPP/DCMI/FMC/LPTIM1/LPTIM2/LTDC/PSSI/SAI2/TIM4/USART3passive
N11PA0/ADC1/ADC2/FMC/HDP/I2S6/LTDC/PWR/SAI2/SPI6/TIM15/TIM2/TIM5/TIM9/UART4/USART2passive
N12PB10/ADC1/ADC2/FMC/HDP/I2C2/I2S2/I3C2/LPTIM2/LTDC/SPI2/TIM2/USART3passive
N13PB4(NJTRST)/DCMIPP/DCMI/DEBUG/FMC/HDP/I2S1/I2S2/I2S3/I2S6/LTDC/PSSI/SPI1/SPI2/SPI3/SPI6/TIM16/TIM3passive
N14PG8/FMC/HDP/I2S2/LTDC/PWR/RTC/SAI1/SPI2/TIM12/TIM1/UART4/USART1passive
N15PA3/FMC_A17/FMC_ALE/~{SAI1_SD_B}/SPI5_NSS/TIM16_CH1/UART7_RXpassive
P10PG12/FMC_A18/LTDC_G0/~{SAI1_MCLK_B}/SPI5_SCK/TIM17_CH1/UART7_TXpassive
P11PG10/DCMIPP/DCMI/FDCAN2/FMC/HDP/I2S2/LPTIM2/LTDC/PSSI/SPI2/TIM1/UART5/USART3passive
P12PG2/DCMIPP/DCMI/FMC/LTDC/PSSI/SAI1/SAI2/SPI5/TIM14/TIM17/UART7/USART3passive
P13PA7/HDP/I2S1/I2S6/LTDC/SPI1/SPI6/TIM14/TIM1/TIM3/USART1passive
P14PG11/ADC1_EXTI11/ADC2_EXTI11/ETH1_MDC/LTDC_R6/UART7_RXpassive
P15PG0/ETH1_PHY_INTN/LTDC_R0/LTDC_VSYNC/TIM12_CH1/TIM1_CH4N/UART9_RXpassive
R10PG1/DCMIPP/DCMI/FMC/LTDC/PSSI/SAI1/SPI5/TIM13/TIM16/UART7passive
R11PB12/FDCAN2/FMC/HDP/I2C2/I2S2/LPTIM2/LTDC/SPI2/TIM1/UART5/USART3passive
R12PB5(JTDO/TRACESWO)/DCMIPP/DCMI/DEBUG/FDCAN2/FMC/HDP/I2C1/I2S1/I2S3/I2S6/LTDC/PSSI/SPI1/SPI3/SPI6passive
R13PA15(JTDI)/ADC1/ADC2/DEBUG/FMC/HDP/I2S1/I2S3/I2S6/LTDC/SPI1/SPI3/SPI6/TIM2/UART4/UART7passive
R14PG9/FMC_D8/FMC_DA8/LTDC_R7passive
R15VSSpassive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed