ST MICROELECTRONICS STM32N655Z0

celestial-altium-MCU_STM32

Symbol

140 pins
Schematic symbol for ST MICROELECTRONICS STM32N655Z0
Units
5
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
A1PDR_ONpassive
A2OTG2_ID/USB2_OTG_HS_IDpassive
A3OTG2_HSDM/USB2_OTG_HS_DMpassive
A5OTG1_HSDM/USB1_OTG_HS_DMpassive
A6OTG1_TXRTUNEpassive
A7PH0-OSC_IN(PH0)/RCC_OSC_INpassive
A8PC8/DCMIPP/DCMI/DEBUG/HDP/I2C3/LTDC/PSSI/TIM3/UART5/UCPD1passive
A9PC10/DCMIPP_D14/HDP_HDP2/I2C4_SCL/I2S3_CK/I3C2_SCL/PSSI_D14/SPI3_SCK/UART4_TX/USART3_TXpassive
B1PC15-OSC32_OUT(OSC32_OUT)/ADC1_EXTI15/ADC2_EXTI15/RCC_OSC32_OUTpassive
B2BOOT0passive
B3OTG2_HSDP/USB2_OTG_HS_DPpassive
B4OTG1_ID/USB1_OTG_HS_IDpassive
B5OTG1_HSDP/USB1_OTG_HS_DPpassive
B6VDD33USBpassive
B7PH1-OSC_OUT(PH1)/RCC_OSC_OUTpassive
B8PC9/AUDIOCLK/DCMIPP/DCMI/HDP/I2C3/LTDC/PSSI/RCC/TIM3/UART5/UCPD1passive
B9PC11/ADC1/ADC2/DCMIPP/DCMI/HDP/I2C4/I2S3/I3C2/PSSI/SPI3/UART4/USART3passive
C1PC14-OSC32_IN(OSC32_IN)/RCC_OSC32_INpassive
C2NRSTpassive
D1VBATpassive
D2PWR_ONpassive
D4VDDA18USBpassive
D5OTG2_TXRTUNEpassive
D6UCPD1_CC1passive
D7UCPD1_CC2passive
D8VDDIO4passive
D9VSSpassive
E1V08CAPpassive
E2PC13/HDP_HDP5/PWR_WKUP3/RTC_OUT1/RTC_TS/TAMP_IN1/TAMP_OUT2passive
E4VDDA18AONpassive
F1VDDA18PMUpassive
F2VSSAPMUpassive
F3VFBSMPSpassive
F4VSSAONpassive
G1VSSSMPSpassive
G2VSSSMPSpassive
G3VSSSMPSpassive
H1VLXSMPSpassive
H2VLXSMPSpassive
H3VLXSMPSpassive
J1VDDSMPSpassive
J2VDDSMPSpassive
J3VDDSMPSpassive
K1PF4/ADC1/DCMIPP/DCMI/HDP/I2S1/I2S3/I2S6/LTDC/PSSI/SPI1/SPI3/SPI6passive
K2PF10/DCMIPP/DCMI/LTDC/MDF1/PSSI/SAI1/UART7/UCPD1passive
K3PF5/DCMIPP_D6/DCMI_D6/LPTIM2_IN2/LTDC_G0/PSSI_D6/SAI2_SD_A/USART3_CTS/USART3_NSSpassive
K4VDDA18PLLpassive
L1PF2/FDCAN3_TX/LTDC_B1passive
L2PF14/ADC2_INN2/ADC2_INP6/LTDC_G0/SPI5_MOSI/TIM2_CH2/USART1_CTSpassive
L4PF3/ADC1_INP16/DCMIPP_HSYNC/DCMI_HSYNC/FDCAN3_RX/LTDC_R4/PSSI_DEpassive
M1PF15/ADC1_EXTI15/ADC2_EXTI15/LTDC_G1/SPI5_SCK/USART1_RTSpassive
M2PF7/ADC1/ADC2/GFXTIM/HDP/I2S1/LTDC/SPI1/TIM3/TIM9/UART4passive
M4VSSpassive
M5VDDCOREpassive
M6VDDCOREpassive
M7VDDCOREpassive
M8VDDCOREpassive
M9VDDCOREpassive
N1PF8/DEBUG_TRACECLK/LTDC_R6passive
N2PF11/ADC1_EXTI11/ADC1_INP2/ADC2_EXTI11/DCMIPP_D15/LTDC_B0/PSSI_D15/~{SAI2_SD_B}/SPI5_MOSIpassive
N3PF13/ADC2_INP2/DCMIPP_D10/DCMI_D10/PSSI_D10/SPI5_NSS/USART1_TXpassive
P1PF12/ADC1_INN2/ADC1_INP6/DCMIPP_D13/DCMI_D13/PSSI_D13/SPI5_MISO/USART1_RXpassive
P2VREF+passive
P3VSSApassive
P4CSI_D1Npassive
P5CSI_CKNpassive
P6CSI_D0Npassive
P7CSI_REXTpassive
P8VDDCSIpassive
P9PG14/DCMIPP_D11/DCMI_D11/DEBUG_TRACED1/I2S6_SDO/LTDC_B1/PSSI_D11/SPI6_MOSIpassive
R1VSSpassive
R2VREF-passive
R3VDDA18ADCpassive
R4CSI_D1Ppassive
R5CSI_CKPpassive
R6CSI_D0Ppassive
R7VDDA18CSIpassive
R8PA14(JTCK/DEBUG_JTCK-SWCLK/HDP_HDP6/SWCLK)passive
R9PA13(JTMS/DEBUG_JTMS-SWDIO/HDP_HDP5/SWDIO)passive
A10PC12/DCMIPP/DCMI/DEBUG/HDP/I2S3/I2S6/PSSI/SPI3/SPI6/TIM15/UART5/USART3passive
A11PE13/ADF1_CCK0/I2C4_SCL/~{SAI2_FS_B}/SPI4_MISOpassive
A12PE7/MDF1_CKI0/~{SAI2_SD_B}/UART7_RXpassive
A13PE9/MDF1_CKI4/UART7_RTSpassive
A14PE0/DCMIPP_D2/DCMI_D2/LPTIM2_ETR/PSSI_D2/SAI2_MCLK_A/TAMP_IN6/TAMP_OUT5/USART3_RXpassive
A15VSSpassive
B10PH2/DCMIPP_D11/DCMI_D11/DEBUG_TRACED2/FDCAN1_TX/PSSI_D11/TIM15_BKIN/TIM3_ETR/UART5_RXpassive
B11PE12/FDCAN3_RX/MDF1_SDI5/~{SAI2_SCK_B}/SPI4_SCKpassive
B12PD1/FDCAN1_TX/UART4_TXpassive
B13PE10/DCMIPP_D3/DCMI_D3/DEBUG_TRACECLK/MDF1_SDI4/PSSI_D3/UART7_CTS/USART3_RXpassive
B14PE1/DCMIPP_D8/DCMI_D8/LPTIM2_CH2/PSSI_D8/USART3_TXpassive
B15PE2/ADF1_CCK0/DEBUG_TRACECLK/MDF1_CCK0/SAI1_CK1/SAI1_MCLK_A/SPI4_SCK/UCPD1_FRSTX1passive
C13PD8/DCMIPP_D11/DCMI_D11/LTDC_R7/PSSI_D11/TAMP_IN3/TAMP_OUT4/USART3_TXpassive
C14PB0/ADF1/DCMIPP/DCMI/DEBUG/MDF1/PSSI/SAI1/SPI4/TIM15passive
C15PE3/DEBUG_TRACED0/MDF1_CKI2/~{SAI1_SD_B}/TIM15_BKINpassive
D10PE14/ADF1_CCK1/GFXTIM_FCKCAL/GFXTIM_LCKCAL/I2C4_SDA/~{SAI2_MCLK_B}/SPI4_MOSIpassive
D11PE15/ADC1_EXTI15/ADC2_EXTI15/GFXTIM_FCKCAL/GFXTIM_LCKCAL/I2C4_SMBA/SPI5_SCKpassive
D12PE8/DCMIPP_D4/DCMI_D4/MDF1_SDI0/PSSI_D4/UART7_TX/USART3_TXpassive
D14PN1/XSPIM_P2_NCS1passive
D15PB6/ADF1/DCMIPP/DCMI/DEBUG/MDF1/PSSI/SAI1/SPI4/TIM15passive
E12PB7/ADF1/DCMIPP/DCMI/DEBUG/MDF1/PSSI/SAI1/SAI2/SPI4/TIM15passive
E14PN4/XSPIM_P2_IO2passive
E15PN8/XSPIM_P2_IO4passive
F12VDDpassive
F14PN7/XSPIM_P2_NCLKpassive
F15PN5/XSPIM_P2_IO3passive
G12VDDpassive
G14PN9/DCMIPP_D5/DCMI_D5/PSSI_D5/XSPIM_P2_IO5passive
G15PN6/XSPIM_P2_CLKpassive
H12VDDpassive
H14PN10/LTDC_B4/XSPIM_P2_IO6passive
H15PN2/XSPIM_P2_IO0passive
J12VSSpassive
J14PN11/ADC1_EXTI11/ADC2_EXTI11/LTDC_B6/XSPIM_P2_IO7passive
J15PN0/XSPIM_P2_DQS0passive
K12VDDIO3passive
K14PN12/XSPIM_P2_NCS2passive
K15PN3/XSPIM_P2_IO1passive
L12VDDIO3passive
L14PB4(NJTRST)/DCMIPP/DCMI/DEBUG/HDP/I2S1/I2S3/I2S6/LTDC/PSSI/SPI1/SPI3/SPI6/TIM3/UART7passive
L15PA15(JTDI)/ADC1/ADC2/DEBUG/HDP/I2S1/I2S3/I2S6/LTDC/SPI1/SPI3/SPI6/TIM2/UART4/UART7passive
M10VSSpassive
M11PA8/ADC1_INP5/ADC2_INP5/HDP_HDP0/I2C3_SCL/I3C2_SCL/LTDC_B6/RCC_MCO_1/TIM11_CH1/UART7_RX/USART1_CKpassive
M12VSSpassive
M14PG2/DCMIPP_D6/DCMI_D6/LTDC_R0/PSSI_D6/~{SAI1_FS_B}/~{SAI2_MCLK_B}/SPI5_MOSI/TIM14_CH1/UART7_CTS/USART3_RTSpassive
M15PB5(JTDO/TRACESWO)/DCMIPP/DCMI/DEBUG/FDCAN2/HDP/I2S1/I2S3/I2S6/LTDC/PSSI/SPI1/SPI3/SPI6/TIM3/UART5passive
N13PB12/FDCAN2_RX/HDP_HDP4/I2C2_SMBA/LPTIM2_IN2/LTDC_G5/UART5_RX/USART3_CKpassive
N14PB11/ADC1/ADC2/HDP/I2C2/I3C2/LPTIM2/LTDC/TIM2/USART3passive
N15PB10/ADC1/ADC2/HDP/I2C2/I3C2/LPTIM2/LTDC/TIM2/USART3passive
P10PA12/ADC1/ADC2/FDCAN1/HDP/LPUART1/LTDC/SAI2/UART4/USART1passive
P11PA9/ADC1/ADC2/DCMIPP/DCMI/HDP/I2C3/I3C2/LPUART1/LTDC/PSSI/USART1passive
P12PA2/ADC1_INP14/ADC2_INP14/HDP_HDP2/LTDC_B7/MDIOS_MDIO/PWR_WKUP2/~{SAI2_SCK_B}/TIM15_CH1/TIM2_CH3passive
P13PA6/BOOT1/ADC1/ADC2/DCMIPP/DCMI/HDP/I2S1/I2S6/I3C1/LTDC/MDIOS/PSSI/SPI1/SPI6/TIM13/TIM3passive
P14PA1/ADC1/ADC2/DCMIPP/DCMI/HDP/LTDC/PSSI/SAI2/TIM15/TIM2/UART4passive
P15PG10/DCMIPP_D2/DCMI_D2/FDCAN2_TX/HDP_HDP5/LPTIM2_CH1/LTDC_G4/PSSI_D2/UART5_TX/USART3_CTS/USART3_NSSpassive
R10PA11/ADC1/ADC2/FDCAN1/HDP/LPUART1/LTDC/UART4/USART1passive
R11PA10/ADC1/ADC2/DCMIPP/DCMI/HDP/LPUART1/LTDC/MDIOS/PSSI/PWR/USART1passive
R12PA5/ADC2/DCMIPP/DCMI/HDP/I2S1/I2S6/I3C1/LTDC/PSSI/PWR/SPI1/SPI6/TIM10/TIM2/TIM9passive
R13PG13/DCMIPP_D12/DCMI_D12/LPTIM2_IN1/LTDC_DE/PSSI_D12/SAI2_FS_A/USART3_RTSpassive
R14PA0/ADC1/ADC2/HDP/I2S6/LTDC/PWR/SAI2/SPI6/TIM15/TIM2/TIM9/UART4passive
R15VSSpassive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed