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TI MSPM0G110X LQFP-64 PM

celestial-altium-MCU_TI

Symbol

64 pins
Schematic symbol for TI MSPM0G110X LQFP-64 PM
Units
2
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
1PB13/PB13/UART3.RX/TIMA0.CCP3/TIMG12.CCP0/TIMA0.CCP1_CMPLpassive
2PB14/PB14/SPI1.CS3_CD_POCI3/SPI1.POCI/SPI0.CS3_CD_POCI3/TIMG12.CCP1/TIMG8.IDX/TIMA0.CCP0passive
3PB15/PB15/UART2.TX/SPI1.PICO/UART3.CTS/TIMG8.CCP0/TIMG7.CCP0passive
4PB16/PB16/UART2.RX/SPI1.SCLK/UART3.RTS/TIMG8.CCP1/TIMG7.CCP1passive
5PA12/PA12/UART3.CTS/SPI0.SCLK/TIMG0.CCP0/TIMA0.CCP3/SYSCTL.FCC_INpassive
6PA13/PA13/UART3.RTS/SPI0.POCI/UART3.RX/TIMG0.CCP1/TIMA0.CCP3_CMPLpassive
7PA14/PA14/UART0.CTS/SPI0.PICO/UART3.TX/TIMG12.CCP0/SYSCTL.CLK_OUT/ADC0.12passive
8PA15/PA15/UART0.RTS/SPI1.CS2_POCI2/I2C1.SCL/TIMA1.CCP0/TIMG8.IDX/TIMA1.CCP0_CMPL/TIMA0.CCP2/ADC1.0passive
9PA16/PA16/SPI1.POCI/I2C1.SDA/TIMA1.CCP1/TIMA1.CCP1_CMPL/TIMA0.CCP2_CMPL/SYSCTL.FCC_IN/ADC1.1passive
10PA17/PA17/UART1.TX/SPI1.SCLK/I2C1.SCL/TIMA0.CCP3/TIMG7.CCP0/TIMA1.CCP0/ADC1.2passive
11PA18/PA18/UART1.RX/SPI1.PICO/I2C1.SDA/TIMA0.CCP3_CMPL/TIMG7.CCP1/TIMA1.CCP1/ADC1.3/GPAMP.IN-passive
12PA19/PA19/DEBUGSS.SWDIOpassive
13PA20/PA20/DEBUGSS.SWCLKpassive
14PB17/PB17/UART2.TX/SPI0.PICO/SPI1.CS1_POCI1/TIMA1.CCP0/TIMA0.CCP2/ADC1.4passive
15PB18/PB18/UART2.RX/SPI0.SCLK/SPI1.CS2_POCI2/TIMA1.CCP1/TIMA0.CCP2_CMPL/ADC1.5passive
16PB19/PB19/SPI0.POCI/TIMG8.CCP1/UART0.CTS/TIMG7.CCP1/ADC1.6passive
17PA21/PA21/UART2.TX/TIMG8.CCP0/UART1.CTS/TIMA0.CCP0/TIMG6.CCP0/ADC1.7/ADC0.8/VREF.VREF-passive
18PA22/PA22/UART2.RX/TIMG8.CCP1/UART1.RTS/TIMA0.CCP1/TIMG6.CCP1/ADC0.7/ADC1.8/GPAMP.OUT/CLK/CCP0passive
19PB20/PB20/SPI1.CS0/TIMA0.CCP2/TIMG12.CCP0/TIMA0.FAULT1/TIMA1.FAULT1/TIMA0.CCP1/ADC0.6/CS2/CCP1passive
20PB21/PB21/SPI1.POCI/TIMG8.CCP0passive
21PB22/PB22/SPI1.PICO/TIMG8.CCP1passive
22PB23/PB23/SPI1.SCLK/TIMA0.FAULT0/TIMA1.FAULT0passive
23PB24/PB24/TIMA0.CCP3/TIMG12.CCP1/ADC0.5/CS3/CS1/CCP1/CCP0passive
24PA23/PA23/UART2.TX/TIMA0.CCP3/TIMG0.CCP0/UART3.CTS/TIMG7.CCP0/TIMG8.CCP0/VREF.VREF+/CS3passive
25PA24/PA24/UART2.RX/SPI0.CS2_POCI2/TIMA0.CCP3_CMPL/TIMG0.CCP1/UART3.RTS/TIMG7.CCP1/TIMA1.CCP1/ADC0.3passive
26PA25/PA25/UART3.RX/SPI1.CS3_CD_POCI3/TIMG12.CCP1/TIMA0.CCP3/TIMA0.CCP1_CMPL/ADC0.2passive
27PB25/PB25/UART0.CTS/SPI0.CS0/TIMA0.FAULT2/TIMA1.FAULT2/ADC0.4passive
28PB26/PB26/UART0.RTS/SPI0.CS1_POCI1/TIMA0.CCP3/TIMG6.CCP0/TIMA1.CCP0passive
29PB27/PB27/SPI1.CS1_POCI1/TIMA0.CCP3_CMPL/TIMG6.CCP1/TIMA1.CCP1passive
30PA26/PA26/UART3.TX/SPI1.CS0/TIMG8.CCP0/TIMA0.FAULT0/TIMA1.FAULT0/TIMG7.CCP0/ADC0.1/GPAMP.IN+passive
31PA27/PA27/RTC.RTC_OUT/SPI1.CS1_POCI1/TIMG8.CCP1/TIMA0.FAULT2/TIMA1.FAULT2/TIMG7.CCP1/ADC0.0passive
32VCOREpassive
33PA0/PA0/UART0.TX/I2C0.SDA/TIMA0.CCP0/TIMA0.FAULT1/TIMA1.FAULT1/TIMG8.CCP1/SYSCTL.FCC_INpassive
34PA1/PA1/UART0.RX/I2C0.SCL/TIMA0.CCP1/TIMA0.FAULT2/TIMA1.FAULT2/TIMG8.IDX/TIMG8.CCP0passive
35PA28/PA28/UART0.TX/I2C0.SDA/TIMA0.CCP3/TIMA0.FAULT0/TIMA1.FAULT0/TIMG7.CCP0/TIMA1.CCP0passive
36PA29/PA29/I2C1.SCL/UART2.RTS/TIMG8.CCP0/TIMG6.CCP0passive
37PA30/PA30/I2C1.SDA/UART2.CTS/TIMG8.CCP1/TIMG6.CCP1passive
38NRST/SYSCTL.NRSTpassive
39PA31/PA31/UART0.RX/I2C0.SCL/TIMA0.CCP3_CMPL/TIMG12.CCP1/SYSCTL.CLK_OUT/TIMG7.CCP1/TIMA1.CCP1passive
40VDDpassive
41VSSpassive
42PA2/PA2/TIMG8.CCP1/SPI0.CS0/TIMG7.CCP1/SPI1.CS0/SYSCTL.ROSCpassive
43PA3/PA3/TIMG8.CCP0/SPI0.CS1_POCI1/UART2.CTS/TIMA0.CCP2/TIMG7.CCP0/TIMA0.CCP1/I2C1.SDA/SYSCTL.LFXINpassive
44PA4/PA4/TIMG8.CCP1/SPI0.POCI/UART2.RTS/TIMA0.CCP3/SYSCTL.LFCLKIN/TIMG7.CCP1/I2C1.SCL/SYSCTL.LFXOUTpassive
45PA5/PA5/TIMG8.CCP0/SPI0.PICO/TIMA0.FAULT1/TIMA1.FAULT1/TIMG0.CCP0/TIMG6.CCP0/SYSCTL.HFXIN/FCCpassive
46PA6/PA6/TIMG8.CCP1/SPI0.SCLK/TIMA0.FAULT0/TIMA1.FAULT0/TIMG0.CCP1/SYSCTL.HFCLKIN/TIMG6.CCP1passive
47PB0/PB0/UART0.TX/SPI1.CS2_POCI2/TIMA1.CCP0/TIMA0.CCP2passive
48PB1/PB1/UART0.RX/SPI1.CS3_CD_POCI3/TIMA1.CCP1/TIMA0.CCP2_CMPLpassive
49PA7/PA7/SYSCTL.CLK_OUT/TIMG8.CCP0/TIMA0.CCP2/TIMG8.IDX/TIMG7.CCP1/TIMA0.CCP1passive
50PB2/PB2/UART3.TX/UART2.CTS/I2C1.SCL/TIMA0.CCP3/UART1.CTS/TIMG6.CCP0/TIMA1.CCP0passive
51PB3/PB3/UART3.RX/UART2.RTS/I2C1.SDA/TIMA0.CCP3_CMPL/UART1.RTS/TIMG6.CCP1/TIMA1.CCP1passive
52PB4/PB4/UART1.TX/UART3.CTS/TIMA1.CCP0/TIMA0.CCP2/TIMA1.CCP0_CMPLpassive
53PB5/PB5/UART1.RX/UART3.RTS/TIMA1.CCP1/TIMA0.CCP2_CMPL/TIMA1.CCP1_CMPLpassive
54PA8/PA8/UART1.TX/SPI0.CS0/UART0.RTS/TIMA0.CCP0/TIMA1.CCP0_CMPLpassive
55PA9/PA9/UART1.RX/SPI0.PICO/UART0.CTS/TIMA0.CCP1/RTC/CCP0/CCP1/CLKpassive
56PA10/PA10/UART0.TX/SPI0.POCI/I2C0.SDA/TIMA1.CCP0/TIMG12.CCP0/TIMA0.CCP2/I2C1.SDA/SYSCTL.CLK_OUTpassive
57PA11/PA11/UART0.RX/SPI0.SCLK/I2C0.SCL/TIMA1.CCP1/TIMA0.CCP2_CMPL/I2C1.SCLpassive
58PB6/PB6/UART1.TX/SPI1.CS0/SPI0.CS1_POCI1/TIMG8.CCP0/UART2.CTS/TIMG6.CCP0/TIMA1.CCP0_CMPLpassive
59PB7/PB7/UART1.RX/SPI1.POCI/SPI0.CS2_POCI2/TIMG8.CCP1/UART2.RTS/TIMG6.CCP1/TIMA1.CCP1_CMPLpassive
60PB8/PB8/UART1.CTS/SPI1.PICO/TIMA0.CCP0passive
61PB9/PB9/UART1.RTS/SPI1.SCLK/TIMA0.CCP1/TIMA0.CCP0_CMPLpassive
62PB10/PB10/TIMG0.CCP0/TIMG8.CCP0/TIMG6.CCP0passive
63PB11/PB11/TIMG0.CCP1/TIMG8.CCP1/SYSCTL.CLK_OUT/TIMG6.CCP1passive
64PB12/PB12/UART3.TX/TIMA0.CCP2/TIMA0.FAULT1/TIMA1.FAULT1/TIMA0.CCP1passive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed