TI MSPM0G150X VQFN-48 RGZ

celestial-altium-MCU_TI

Symbol

49 pins
Schematic symbol for TI MSPM0G150X VQFN-48 RGZ
Units
2
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
1PA0/PA0/UART0.TX/I2C0.SDA/TIMA0.CCP0/TIMA0.FAULT1/TIMA1.FAULT1/TIMG8.CCP1/SYSCTL.FCC_INpassive
2PA1/PA1/UART0.RX/I2C0.SCL/TIMA0.CCP1/TIMA0.FAULT2/TIMA1.FAULT2/TIMG8.IDX/TIMG8.CCP0passive
3PA28/PA28/UART0.TX/I2C0.SDA/TIMA0.CCP3/TIMA0.FAULT0/TIMA1.FAULT0/TIMG7.CCP0/TIMA1.CCP0passive
4NRST/SYSCTL.NRSTpassive
5PA31/PA31/UART0.RX/I2C0.SCL/TIMA0.CCP3_CMPL/TIMG12.CCP1/SYSCTL.CLK_OUT/TIMG7.CCP1/TIMA1.CCP1passive
6VDDpassive
7VSSpassive
8PA2/PA2/TIMG8.CCP1/SPI0.CS0/TIMG7.CCP1/SPI1.CS0/SYSCTL.ROSCpassive
9PA3/PA3/TIMG8.CCP0/UART2.CTS/TIMA0.CCP2/COMP1.OUT/TIMG7.CCP0/TIMA0.CCP1/I2C1.SDA/SYSCTL.LFXIN/CS1passive
10PA4/PA4/TIMG8.CCP1/SPI0.POCI/UART2.RTS/TIMA0.CCP3/SYSCTL.LFCLKIN/TIMG7.CCP1/I2C1.SCL/SYSCTL.LFXOUTpassive
11PA5/PA5/TIMG8.CCP0/SPI0.PICO/TIMA0.FAULT1/TIMA1.FAULT1/TIMG0.CCP0/TIMG6.CCP0/SYSCTL.HFXIN/FCCpassive
12PA6/PA6/TIMG8.CCP1/SPI0.SCLK/TIMA0.FAULT0/TIMA1.FAULT0/TIMG0.CCP1/SYSCTL.HFCLKIN/TIMG6.CCP1passive
13PA7/PA7/COMP0.OUT/SYSCTL.CLK_OUT/TIMG8.CCP0/TIMA0.CCP2/TIMG8.IDX/TIMG7.CCP1/TIMA0.CCP1passive
14PB2/PB2/UART3.TX/UART2.CTS/I2C1.SCL/TIMA0.CCP3/UART1.CTS/TIMG6.CCP0/TIMA1.CCP0passive
15PB3/PB3/UART3.RX/UART2.RTS/I2C1.SDA/TIMA0.CCP3_CMPL/UART1.RTS/TIMG6.CCP1/TIMA1.CCP1passive
16PA8/PA8/UART1.TX/SPI0.CS0/UART0.RTS/TIMA0.CCP0/TIMA1.CCP0_CMPLpassive
17PA9/PA9/UART1.RX/SPI0.PICO/UART0.CTS/TIMA0.CCP1/RTC/CCP0/CCP1/CLKpassive
18PA10/PA10/UART0.TX/SPI0.POCI/I2C0.SDA/TIMA1.CCP0/TIMG12.CCP0/TIMA0.CCP2/I2C1.SDA/SYSCTL.CLK_OUTpassive
19PA11/PA11/UART0.RX/SPI0.SCLK/I2C0.SCL/TIMA1.CCP1/COMP0.OUT/TIMA0.CCP2_CMPL/I2C1.SCLpassive
20PB6/PB6/UART1.TX/SPI1.CS0/SPI0.CS1_POCI1/TIMG8.CCP0/UART2.CTS/TIMG6.CCP0/TIMA1.CCP0_CMPLpassive
21PB7/PB7/UART1.RX/SPI1.POCI/SPI0.CS2_POCI2/TIMG8.CCP1/UART2.RTS/TIMG6.CCP1/TIMA1.CCP1_CMPLpassive
22PB8/PB8/UART1.CTS/SPI1.PICO/TIMA0.CCP0/COMP1.OUTpassive
23PB9/PB9/UART1.RTS/SPI1.SCLK/TIMA0.CCP1/TIMA0.CCP0_CMPLpassive
24PB14/PB14/SPI1.CS3_CD_POCI3/SPI1.POCI/SPI0.CS3_CD_POCI3/TIMG12.CCP1/TIMG8.IDX/TIMA0.CCP0passive
25PB15/PB15/UART2.TX/SPI1.PICO/UART3.CTS/TIMG8.CCP0/TIMG7.CCP0passive
26PB16/PB16/UART2.RX/SPI1.SCLK/UART3.RTS/TIMG8.CCP1/TIMG7.CCP1passive
27PA12/PA12/UART3.CTS/SPI0.SCLK/TIMG0.CCP0/TIMA0.CCP3/SYSCTL.FCC_INpassive
28PA13/PA13/UART3.RTS/SPI0.POCI/UART3.RX/TIMG0.CCP1/TIMA0.CCP3_CMPL/COMP0.IN2-passive
29PA14/PA14/UART0.CTS/SPI0.PICO/UART3.TX/TIMG12.CCP0/SYSCTL.CLK_OUT/COMP0.IN2+/ADC0.12passive
30PA15/PA15/UART0.RTS/I2C1.SCL/TIMA1.CCP0/TIMG8.IDX/TIMA0.CCP2/ADC1.0/DAC0.OUT/COMP0.IN3+/COMP1.IN3+passive
31PA16/PA16/COMP2.OUT/SPI1.POCI/I2C1.SDA/TIMA1.CCP1/ADC1.1/OPA1.OUT/CCP1/CCP2/FCCpassive
32PA17/PA17/UART1.TX/SPI1.SCLK/I2C1.SCL/TIMA0.CCP3/TIMG7.CCP0/TIMA1.CCP0/ADC1.2/OPA1.IN1-/COMP0.IN1-passive
33PA18/PA18/UART1.RX/SPI1.PICO/I2C1.SDA/TIMG7.CCP1/TIMA1.CCP1/ADC1.3/OPA1.IN1+/COMP0.IN1+/GPAMP.IN-passive
34PA19/PA19/DEBUGSS.SWDIOpassive
35PA20/PA20/DEBUGSS.SWCLKpassive
36PB17/PB17/UART2.TX/SPI0.PICO/SPI1.CS1_POCI1/TIMA1.CCP0/TIMA0.CCP2/ADC1.4/COMP1.IN2-passive
37PB18/PB18/UART2.RX/SPI0.SCLK/SPI1.CS2_POCI2/TIMA1.CCP1/TIMA0.CCP2_CMPL/ADC1.5/COMP1.IN2+passive
38PB19/PB19/COMP2.OUT/SPI0.POCI/TIMG8.CCP1/UART0.CTS/TIMG7.CCP1/ADC1.6/COMP2.IN1+/OPA1.IN0+passive
39PA21/PA21/UART2.TX/TIMG8.CCP0/UART1.CTS/TIMA0.CCP0/TIMG6.CCP0/ADC1.7/ADC0.8/COMP2.IN1-/VREF.VREF-passive
40PA22/PA22/UART2.RX/TIMG8.CCP1/UART1.RTS/TIMA0.CCP1/TIMG6.CCP1/ADC0.7/ADC1.8/OPA0.OUT/GPAMP.OUT/CLKpassive
41PB20/PB20/SPI1.CS0/TIMA0.CCP2/TIMG12.CCP0/TIMA0.FAULT1/TIMA1.FAULT1/TIMA0.CCP1/ADC0.6/OPA1.IN0-/CS2passive
42PB24/PB24/TIMA0.CCP3/TIMG12.CCP1/ADC0.5/COMP1.IN1+/CS3/CS1/CCP1/CCP0passive
43PA23/PA23/UART2.TX/TIMA0.CCP3/TIMG0.CCP0/UART3.CTS/TIMG7.CCP0/TIMG8.CCP0/COMP1.IN1-/VREF.VREF+/CS3passive
44PA24/PA24/UART2.RX/TIMG0.CCP1/UART3.RTS/TIMG7.CCP1/TIMA1.CCP1/ADC0.3/OPA0.IN1-/CS2/CCP3passive
45PA25/PA25/UART3.RX/SPI1.CS3_CD_POCI3/TIMG12.CCP1/TIMA0.CCP3/TIMA0.CCP1_CMPL/ADC0.2/OPA0.IN1+passive
46PA26/PA26/UART3.TX/SPI1.CS0/TIMG8.CCP0/TIMA0.FAULT0/TIMA1.FAULT0/TIMG7.CCP0/ADC0.1/COMP0.IN0+passive
47PA27/PA27/TIMG8.CCP1/TIMA0.FAULT2/TIMA1.FAULT2/TIMG7.CCP1/ADC0.0/COMP0.IN0-/OPA0.IN0-/RTC/CS1passive
48VCOREpassive
49VSSpassive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed