TI MSPM0G351X LQFP-80 PN

celestial-altium-MCU_TI

Symbol

80 pins
Schematic symbol for TI MSPM0G351X LQFP-80 PN
Units
3
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
1PA0/PA0/UART0.TX/I2C0.SDA/TIMA0.CCP0/TIMA0.FAULT1/TIMA1.FAULT1/TIMG8.CCP1/TIMG12.CCP0/TIMG0.CCP0passive
2PA1/PA1/UART0.RX/I2C0.SCL/TIMA0.CCP1/TIMA0.FAULT2/TIMA1.FAULT2/TIMG8.IDX/TIMG8.CCP0/TIMG12.CCP1passive
3PA28/PA28/UART0.TX/I2C0.SDA/TIMA0.CCP3/TIMA0.FAULT0/TIMA1.FAULT0/TIMA0.CCP1/TIMA1.CCP0/TIMG14.CCP2passive
4PA29/PA29/I2C1.SCL/UART7.RTS/TIMG8.CCP0/I2C2.SCL/UART0.CTS/TIMG6.CCP0/TIMG14.CCP3/TIMG14.CCP0passive
5PA30/PA30/I2C1.SDA/UART7.CTS/TIMG8.CCP1/I2C2.SDA/UART0.RTS/SPI0.CS2_POCI2/TIMG6.CCP1/TIMG14.CCP1passive
6NRST/SYSCTL.NRSTpassive
7PA31/PA31/UART0.RX/I2C0.SCL/TIMG12.CCP1/TIMG7.CCP1/TIMA1.CCP1/CCP3/CLK/CS3passive
8VDDpassive
9VSSpassive
10PA2/PA2/TIMG8.CCP1/SPI0.CS0/TIMG7.CCP1/SPI1.CS0/TIMA0.FAULT0/TIMA1.FAULT0/TIMA0.FAULT1/TIMA1.FAULT1passive
11PA3/PA3/TIMG8.CCP0/I2C1.SDA/TIMA0.CCP1/COMP0.OUT/TIMG9.CCP0/TIMA0.CCP2/UART7.CTS/UART1.TX/COMP1.OUTpassive
12PA4/PA4/TIMG8.CCP1/SPI0.POCI/I2C1.SCL/SYSCTL.LFCLKIN/TIMG9.IDX/TIMA0.CCP3/UART7.RTS/UART1.RXpassive
13PA5/PA5/TIMG8.CCP0/SPI0.PICO/I2C1.SDA/TIMG0.CCP0/TIMG6.CCP0/TIMA0.FAULT1/TIMA1.FAULT1/UART0.CTSpassive
14PA6/PA6/TIMG8.CCP1/SPI0.SCLK/I2C1.SCL/TIMG0.CCP1/SYSCTL.HFCLKIN/TIMG6.CCP1/TIMA0.FAULT0passive
15PB0/PB0/UART0.TX/I2C0.SCL/TIMA0.CCP2/TIMG0.CCP0/TIMA1.CCP0/TIMG14.CCP2/CS2/CS3passive
16PB1/PB1/UART0.RX/I2C0.SDA/TIMG0.CCP1/TIMA1.CCP1/TIMG14.CCP3/CS3/CCP2/CS2passive
17PA7/PA7/COMP0.OUT/TIMG8.CCP0/TIMA0.CCP2/TIMG8.IDX/TIMG7.CCP1/TIMA0.CCP1/SPI0.POCI/CLK/CS2/FCCpassive
18PB2/PB2/UART3.TX/UART7.CTS/I2C1.SCL/TIMA0.CCP3/UART1.CTS/TIMG14.CCP0/UART7.TX/TIMG12.CCP0passive
19PB3/PB3/UART3.RX/UART7.RTS/I2C1.SDA/UART1.RTS/TIMG14.CCP1/UART7.RX/TIMG12.CCP1/TIMA0.CCP0/SPI0.SCLKpassive
20PB4/PB4/UART1.TX/UART3.CTS/TIMA0.CCP1/TIMA0.CCP2/TIMG0.CCP0/TIMA1.CCP0/TIMA1.CCP0_CMPL/SPI2.PICOpassive
21PB5/PB5/UART1.RX/UART3.RTS/TIMG0.CCP1/TIMA1.CCP1/SPI2.POCI/CCP1/CCP2passive
22PA8/PA8/UART1.TX/SPI0.CS0/I2C0.SDA/TIMA0.CCP0/TIMA0.FAULT2/TIMA1.FAULT2/TIMA0.FAULT0/TIMA1.FAULT0passive
23PA9/PA9/UART1.RX/SPI0.PICO/I2C0.SCL/TIMA0.CCP1/TIMG14.CCP3/UART4.RTS/UART0.CTS/CCP0/CLK/RTC/CCP1passive
24PB28/PB28/I2C2.SCL/SPI1.CS0/TIMA0.FAULT0/TIMA1.FAULT0/TIMA0.CCP0/TIMG0.CCP0/UART5.RX/TIMG14.CCP0passive
25PB29/PB29/I2C2.SDA/SPI1.POCI/TIMA0.FAULT1/TIMA1.FAULT1/TIMG0.CCP1/UART5.TX/TIMG9.CCP0/TIMG14.CCP1passive
26PB30/PB30/UART1.CTS/SPI1.PICO/TIMA0.FAULT2/TIMA1.FAULT2/TIMA0.CCP1/UART5.CTS/TIMG9.CCP1/TIMG14.CCP2passive
27PB31/PB31/UART1.RTS/SPI1.SCLK/TIMG8.IDX/TIMA0.CCP1_CMPL/UART5.RTS/TIMG9.IDX/TIMG14.CCP3/UART6.RTSpassive
28PA10/PA10/UART0.TX/SPI0.POCI/I2C0.SDA/TIMA0.CCP2/TIMG0.CCP0/I2C1.SDA/TIMG12.CCP0/TIMA0.FAULT1passive
29PA11/PA11/UART0.RX/SPI0.SCLK/I2C0.SCL/COMP0.OUT/TIMG0.CCP1/I2C1.SCL/TIMG12.CCP1/TIMA0.FAULT0passive
30PB6/PB6/UART1.TX/SPI1.CS0/I2C2.SCL/TIMG8.CCP0/UART7.CTS/TIMG14.CCP3/TIMA0.FAULT2/TIMA1.FAULT2passive
31PB7/PB7/UART1.RX/SPI1.POCI/I2C2.SDA/TIMG8.CCP1/UART7.RTS/TIMG9.CCP0/TIMG12.CCP1/TIMG6.CCP1/CS2/CCP1passive
32PB8/PB8/UART1.CTS/SPI1.PICO/I2C2.SCL/TIMA0.CCP0/COMP0.OUT/TIMG9.IDX/COMP1.OUTpassive
33PB9/PB9/UART1.RTS/SPI1.SCLK/I2C2.SDA/TIMA0.CCP0_CMPL/TIMA0.CCP1/TIMG9.CCP1passive
34PB10/PB10/TIMG0.CCP0/TIMG8.CCP0/COMP0.OUT/UART4.TX/SPI1.CS3_CD_POCI3/TIMG6.CCP0/COMP1.OUTpassive
35PB11/PB11/TIMG0.CCP1/TIMG8.CCP1/SYSCTL.CLK_OUT/UART4.RX/SPI1.CS2_POCI2/TIMG6.CCP1passive
36PB12/PB12/UART3.TX/TIMA0.CCP2/TIMA0.FAULT1/TIMA1.FAULT1/TIMA0.CCP1/UART4.CTS/TIMG14.CCP0/CS1passive
37PB13/PB13/UART3.RX/TIMA0.CCP3/TIMG12.CCP0/TIMA0.CCP1_CMPL/UART4.RTS/SPI1.CS0/TIMG14.CCP1passive
38PB14/PB14/SPI1.CS3_CD_POCI3/SPI1.POCI/TIMG12.CCP1/TIMA0.CCP0/TIMG8.IDX/SPI0.CS3_CD_POCI3passive
39PB15/PB15/UART7.TX/SPI1.PICO/UART3.CTS/TIMG8.CCP0/I2C2.SCL/TIMG7.CCP0passive
40PB16/PB16/UART7.RX/SPI1.SCLK/UART3.RTS/TIMG8.CCP1/I2C2.SDA/TIMG7.CCP1passive
41PA12/PA12/UART3.CTS/SPI0.SCLK/COMP0.OUT/TIMA0.CCP3/TIMG0.CCP0/UART7.CTS/UART1.CTS/CANFD0.CANTXpassive
42PA13/PA13/UART3.RTS/SPI0.POCI/UART3.RX/TIMG0.CCP1/SPI1.CS0/UART7.TX/UART1.RTS/CANFD0.CANRX/ADC0.9passive
43PA14/PA14/UART0.CTS/SPI0.PICO/UART3.TX/TIMG12.CCP0/TIMG12.CCP1/UART7.RX/ADC0.12/COMP0.IN2+/CLK/CS2passive
44PA15/PA15/UART0.RTS/I2C1.SCL/TIMA0.CCP2/I2C2.SCL/TIMG8.IDX/TIMG12.CCP0/UART7.RTS/TIMA1.CCP0/ADC1.0passive
45PA16/PA16/COMP0.OUT/SPI1.POCI/I2C1.SDA/I2C2.SDA/TIMG12.CCP1/COMP2.OUT/UART7.CTS/TIMA1.CCP1/ADC1.1passive
46PC0/PC0/UART1.TX/SPI1.CS3_CD_POCI3/TIMG8.CCP0/TIMA0.CCP2passive
47PC1/PC1/UART1.RX/SPI1.CS2_POCI2/TIMG8.CCP1/TIMA0.CCP2_CMPLpassive
48VSSpassive
49VDDpassive
50PC2/PC2/I2C2.SCL/SPI1.CS0/TIMA0.FAULT0/TIMA1.FAULT0/TIMA0.CCP0/TIMG0.CCP0passive
51PC3/PC3/I2C2.SDA/SPI1.CS1_POCI1/TIMA0.FAULT1/TIMA1.FAULT1/TIMA0.CCP0_CMPL/TIMG0.CCP1passive
52PC4/PC4/UART3.CTS/SPI1.CS2_POCI2/TIMA0.FAULT2/TIMA1.FAULT2/TIMA0.CCP1/TIMG14.CCP2passive
53PC5/PC5/UART3.RTS/SPI1.CS3_CD_POCI3/TIMG8.IDX/TIMA0.CCP1_CMPL/TIMG14.CCP3passive
54PA17/PA17/UART1.TX/SPI1.SCLK/I2C1.SCL/TIMA0.CCP3/TIMG8.CCP0/TIMG12.CCP0/TIMA1.CCP0/TIMG7.CCP0passive
55PA18/PA18/UART1.RX/SPI1.PICO/I2C1.SDA/TIMG8.CCP1/TIMG12.CCP1/SPI0.CS0/TIMA1.CCP1/TIMG7.CCP1/ADC1.3passive
56PA19/PA19/DEBUGSS.SWDIO/SPI1.POCI/I2C1.SDA/TIMA0.CCP2/TIMG0.CCP0/ADC0.13passive
57PA20/PA20/DEBUGSS.SWCLK/SPI1.SCLK/I2C1.SCL/TIMA0.CCP2_CMPL/TIMG0.CCP1/ADC0.14passive
58PB17/PB17/UART7.TX/SPI0.PICO/I2C0.SCL/TIMA0.CCP2/TIMG0.CCP0/UART4.TX/TIMG14.CCP2/TIMA1.CCP0/ADC1.4passive
59PB18/PB18/UART7.RX/SPI0.SCLK/I2C0.SDA/TIMG0.CCP1/UART4.RX/TIMG14.CCP3/TIMA1.CCP1/ADC1.5/COMP1.IN2+passive
60PB19/PB19/COMP0.OUT/SPI0.POCI/TIMG8.CCP1/UART0.CTS/COMP2.OUT/TIMG8.IDX/UART7.CTS/UART4.CTSpassive
61PA21/PA21/UART7.TX/UART1.CTS/TIMA0.CCP0/UART7.CTS/UART4.RTS/TIMG8.CCP0/TIMG6.CCP0/ADC1.7/COMP2.IN1-passive
62PA22/PA22/UART7.RX/UART1.RTS/TIMA0.CCP1/I2C0.SCL/TIMG8.CCP1/TIMG6.CCP1/ADC0.7/CS2/CCP0/CLKpassive
63PC6/PC6/UART3.TX/SPI0.CS1_POCI1/TIMG8.CCP0/TIMA0.CCP0passive
64PC7/PC7/UART3.RX/SPI0.CS0/TIMG8.CCP1/TIMA0.CCP0_CMPLpassive
65PC8/PC8/UART3.CTS/SPI1.CS2_POCI2/TIMA0.CCP1passive
66PC9/PC9/UART3.RTS/SPI1.CS1_POCI1/TIMA0.CCP1_CMPLpassive
67PB20/PB20/SPI1.CS0/TIMG12.CCP0/TIMA0.CCP2/TIMA0.FAULT1/TIMA1.FAULT1/TIMA0.CCP1/UART7.RTS/I2C0.SDApassive
68PB21/PB21/UART4.TX/SPI1.POCI/I2C0.SCL/TIMG8.CCP0/UART1.TX/CANFD1.CANTX/UART6.RX/ADC1.8/COMP2.IN0+passive
69PB22/PB22/UART4.RX/SPI1.PICO/I2C0.SDA/TIMG8.CCP1/UART1.RX/CANFD1.CANRX/UART6.TX/ADC1.10/COMP2.IN0-passive
70PB23/PB23/UART1.CTS/SPI1.SCLK/TIMA0.FAULT0/TIMA1.FAULT0/COMP0.OUT/UART6.CTS/ADC1.11passive
71PB24/PB24/TIMG12.CCP1/TIMA0.CCP3/UART7.RTS/UART6.RTS/ADC0.5/COMP1.IN1+/CS3/CS1/CCP1/CCP0passive
72PA23/PA23/UART7.TX/I2C2.SCL/TIMA0.CCP3/TIMG8.CCP0/UART3.CTS/TIMG0.CCP0/TIMG7.CCP0/ADC1.12passive
73PA24/PA24/UART7.RX/I2C2.SDA/TIMG8.CCP1/TIMA1.CCP1/UART3.RTS/TIMG0.CCP1/TIMG7.CCP1/ADC0.3/CS2/CCP3passive
74PA25/PA25/UART3.RX/TIMG12.CCP1/TIMA0.CCP3/COMP0.OUT/UART7.CTS/UART3.TX/ADC0.2/CS3/CCP1passive
75PB25/PB25/UART0.CTS/SPI0.CS0/TIMA0.FAULT0/TIMA1.FAULT0/TIMA0.FAULT1/TIMA1.FAULT1/TIMA0.FAULT2passive
76PB26/PB26/UART0.RTS/TIMA0.CCP0/TIMA0.CCP3/COMP0.OUT/TIMA1.CCP0/TIMG6.CCP0/ADC1.13/COMP1.IN0+/CS1passive
77PB27/PB27/COMP0.OUT/COMP2.OUT/TIMA1.CCP1/TIMG6.CCP1/ADC1.14/COMP1.IN0-/CS1/CCP0/CCP3passive
78PA26/PA26/UART3.TX/SPI1.CS0/TIMG8.CCP0/TIMA0.FAULT0/TIMA1.FAULT0/UART7.RTS/UART3.RX/CANFD0.CANTXpassive
79PA27/PA27/UART3.RX/TIMG8.CCP1/TIMA0.FAULT2/TIMA1.FAULT2/COMP0.OUT/CANFD0.CANRX/TIMG7.CCP1/ADC0.0passive
80VCOREpassive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed