TI AM62Px AMH

celestial-altium-MPU_TI

Symbol

455 pins
Schematic symbol for TI AM62Px AMH
Units
7
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
A1VSSpassive
A2DDR0_DQ4passive
A3DDR0_DQ1passive
A4DDR0_DQ2passive
A5DDR0_DQ3passive
A6VSSpassive
A7WKUP_LFOSC0_XIpassive
A8WKUP_LFOSC0_XOpassive
A9VSSpassive
B1VDDS_DDRpassive
B2DDR0_DQ0passive
B3VSSpassive
B4DDR0_DQ5passive
B6MCU_GPIO0_5/MCU_UART0_RXDpassive
B7MCU_GPIO0_8/MCU_UART0_RTSn/MCU_TIMER_IO1/MCU_SPI1_D1passive
B8MCU_GPIO0_7/MCU_UART0_CTSn/MCU_TIMER_IO0/MCU_SPI1_D0passive
B9MCU_GPIO0_22/PMIC_LPM_EN0passive
C1DDR0_DQS0~{_}Npassive
C2VSSpassive
C3DDR0_DM0passive
C4DDR0_DQ7passive
C6MCU_GPIO0_12/WKUP_UART0_RTSn/WKUP_TIMER_IO1/MCU_SPI1_CLKpassive
C7MCU_GPIO0_11/WKUP_UART0_CTSn/WKUP_TIMER_IO0/MCU_SPI1_CS0passive
C8MCU_GPIO0_6/MCU_UART0_TXDpassive
D1DDR0_DQS0_Ppassive
D2DDR0_DQ6passive
D3VSSpassive
D6MCU_GPIO0_14/MCU_MCAN0_RX/MCU_TIMER_IO0/MCU_SPI1_CS3passive
D7MCU_GPIO0_10/WKUP_UART0_TXD/MCU_SPI1_CS2passive
D8MCU_GPIO0_9/WKUP_UART0_RXD/MCU_SPI0_CS2passive
E1VSSpassive
E2DDR0_DQ8passive
E7MCU_GPIO0_16/MCU_MCAN1_RX/MCU_TIMER_IO3/MCU_SPI0_CS2/MCU_SPI1_CS2/MCU_SPI1_CLKpassive
E8MCU_GPIO0_13/MCU_MCAN0_TX/WKUP_TIMER_IO0/MCU_SPI0_CS3passive
F1DDR0_DQ9passive
F2DDR0_DQ11passive
F3VSSpassive
F7VPPpassive
F8MCU_GPIO0_15/MCU_MCAN1_TX/MCU_TIMER_IO2/MCU_SPI1_CS1/MCU_EXT_REFCLK0passive
G1VSSpassive
G2DDR0_DQ15passive
G3DDR0_DQ12passive
G4VSSpassive
G5DDR0_DQ10passive
G6~{MCU_ERROR}passive
H1DDR0_DQS1_Npassive
H2VSSpassive
H3DDR0_DM1passive
H4DDR0_DQ13passive
H6~{MCU_POR}passive
J1DDR0_DQS1_Ppassive
J2DDR0_DQ14passive
K1VSSpassive
K2DDR0_A5passive
K3~{DDR0_ALERT}passive
K4~{DDR0_BA1}passive
K5DDR0_A0passive
L1DDR0_A7passive
L2DDR0_A1passive
L3DDR0_A2passive
L4VSSpassive
L5DDR0_ODT0passive
L6~{DDR0_CS0}passive
M1DDR0_A8passive
M2DDR0_A3passive
N1VSSpassive
N2DDR0_A4passive
N3DDR0_A6passive
N4DDR0_CKE0passive
N5DDR0_A11passive
N6~{DDR0_BA0}passive
P1DDR0_CK0_Npassive
P2DDR0_A13passive
P3DDR0_A12passive
P4VSSpassive
P5DDR0_CKE1passive
P6~{DDR0_RAS}passive
R1DDR0_CK0_Ppassive
R2DDR0_A10passive
T1DDR0_PARpassive
T2DDR0_A9passive
T3~{DDR0_CS1}passive
T4~{DDR0_WE}passive
T5~{DDR0_CAS}passive
T6~{DDR0_ACT}passive
U1VSSpassive
U2DDR0_DQ16passive
U3DDR0_DQ17passive
U4VSSpassive
U5DDR0_DQ18passive
U6~{DDR0_BG1}passive
V1DDR0_DQS2_Npassive
V2DDR0_DQ20passive
V3VSSpassive
V4DDR0_DM2passive
V5DDR0_DQ19passive
V6DDR0_ODT1passive
W1DDR0_DQS2_Ppassive
W2VSSpassive
Y1VSSpassive
Y2DDR0_DQ21passive
Y3DDR0_DQ22passive
Y4VSSpassive
Y5DDR0_CAL0passive
Y6~{DDR0_BG0}passive
Y7USB0_VBUSpassive
Y8USB0_RCALIBpassive
1A1VDD_CANUARTpassive
1A2VDDSHV_CANUARTpassive
1A3VSSpassive
1A4VMON_3P3_SOCpassive
1A5VSSpassive
1A6VMON_VSYSpassive
1A7VSSpassive
1A8CAP_VDDS0passive
1A9VDDSHV5passive
1B1VSSpassive
1B2CAP_VDDS_CANUARTpassive
1B3VDDSHV_MCUpassive
1B4CAP_VDDS_MCUpassive
1B5VDDSHV2passive
1B6CAP_VDDS2passive
1B7VDDSHV0passive
1B8VSSpassive
1B9CAP_VDDS5passive
1C1VDDS_DDRpassive
1C2VDDS_OSC0passive
1C3VDDA_MCUpassive
1C4VSSpassive
1C5VDD_COREpassive
1C6VSSpassive
1C7VDD_COREpassive
1C8VDDR_COREpassive
1C9CAP_VDDS6passive
1D1VSSpassive
1D2VDDS_DDRpassive
1D3VDDA_TEMP2passive
1D4VDDA_PLL0passive
1D5VSSpassive
1D6VDD_COREpassive
1D7VDDA_PLL4passive
1D8VDD_COREpassive
1D9VSSpassive
1E1VDDS_DDRpassive
1E2VDDS_DDR_Cpassive
1E3VDD_COREpassive
1E4VSSpassive
1E5VDDR_COREpassive
1E6VSSpassive
1E7VDD_COREpassive
1E8VSSpassive
1E9VDD_COREpassive
1F1VDDS_DDRpassive
1F2VDDA_DDR_PLL0passive
1F3VSSpassive
1F4VDDA_PLL3passive
1F5VDDA_TEMP0passive
1F6VDDA_PLL2passive
1F7VSSpassive
1F8VDD_COREpassive
1F9VSSpassive
1G1VSSpassive
1G2VDDS_DDRpassive
1G3VDD_COREpassive
1G4VSSpassive
1G5VDD_COREpassive
1G6VSSpassive
1G7VDD_COREpassive
1G8VSSpassive
1G9VDD_COREpassive
1H1VDDS_DDRpassive
1H2VSSpassive
1H3VDDR_COREpassive
1H4VDD_COREpassive
1H5VSSpassive
1H6VDD_COREpassive
1H7VDDA_PLL1passive
1H8VDD_COREpassive
1H9VSSpassive
1J1VDDA_0P85_DLL_MMC0passive
1J2VDD_COREpassive
1J3VSSpassive
1J4VDDA_CORE_USBpassive
1J5VDD_COREpassive
1J6VSSpassive
1J7VDD_COREpassive
1J8VSSpassive
1J9VDD_COREpassive
1K1VSSpassive
1K2VDDS_MMC0passive
1K3VDD_MMC0passive
1K4USB1_RCALIBpassive
1K5VDDA_1P8_USBpassive
1K6VDDA_CORE_CSI_DSIpassive
1K7VDDA_1P8_CSI_DSIpassive
1K8VDDA_CORE_DSI_CLKpassive
1K9VSSpassive
A10MCU_OSC0_XIpassive
A11MCU_OSC0_XOpassive
A12VSSpassive
A13MCU_GPIO0_19/WKUP_I2C0_SCLpassive
A14GPIO0_83/RGMII1_RD2passive
A15GPIO0_79/RGMII1_RX_CTL/RMII1_RX_ERpassive
A16GPIO0_80/RGMII1_RXC/RMII1_REF_CLKpassive
A17GPIO0_77/RGMII1_TD2passive
A18GPIO0_75/RGMII1_TD0/RMII1_TXD0passive
A19GPIO1_0/RGMII2_TD3/CLKOUT0/MCASP2_ACLKX/EQEP2_Spassive
A20GPIO0_87/RGMII2_TX_CTL/RMII2_TX_EN/MCASP2_AXR4passive
A21GPIO0_90/RGMII2_TD1/RMII2_TXD1/MCASP2_ACLKR/MCASP2_AXR8passive
A22GPIO1_20/UART0_RXD/ECAP1_IN_APWM_OUT/SPI2_D0/EHRPWM2_Apassive
A23GPIO1_22/UART0_CTSn/SPI0_CS2/I2C3_SCL/UART2_RXD/TIMER_IO6/AUDIO_EXT_REFCLK0/MCASP2_AFSX/MMC2_SDCDpassive
A24GPIO1_27/I2C0_SDA/SPI2_CS2/TIMER_IO5/UART1_DSRn/~{EQEP2_B}/EHRPWM_SOCB/ECAP2_IN_APWM_OUTpassive
A25VSSpassive
AA1DDR0_DQS3_Ppassive
AA2DDR0_DQ25passive
AA3VSSpassive
AA4DDR0_DQ23passive
AA5~{DDR0_RESET0}passive
AA6MMC0_CLKpassive
AA7MMC0_DAT6passive
AA9CSI0_RXP2passive
AB1DDR0_DQS3~{_}Npassive
AB2VSSpassive
AB6MMC0_DAT7passive
AB7MMC0_DAT1passive
AB8MMC0_CMDpassive
AC1VSSpassive
AC2DDR0_DQ24passive
AC3DDR0_DQ29passive
AC4DDR0_DQ26passive
AC5MMC0_CALPADpassive
AC6MMC0_DAT5passive
AC7MMC0_DAT0passive
AC9CSI0_RXP1passive
AD1DDR0_DM3passive
AD2DDR0_DQ27passive
AD3DDR0_DQ28passive
AD4VSSpassive
AD5MMC0_DSpassive
AD6MMC0_DAT2passive
AD8CSI0_RXP3passive
AD9CSI0_RXN3passive
AE1VSSpassive
AE2VDDS_DDRpassive
AE3DDR0_DQ31passive
AE4DDR0_DQ30passive
AE5MMC0_DAT3passive
AE6MMC0_DAT4passive
AE7USB0_DPpassive
AE8USB0_DMpassive
AE9USB1_DPpassive
B10MCU_GPIO0_0/MCU_SPI0_CS0/WKUP_TIMER_IO1passive
B11MCU_GPIO0_3/MCU_SPI0_D0passive
B12EMU0passive
B13~{TRST}passive
B14GPIO0_84/RGMII1_RD3passive
B15GPIO0_81/RGMII1_RD0/RMII1_RXD0passive
B16GPIO0_82/RGMII1_RD1/RMII1_RXD1passive
B17GPIO0_74/RGMII1_TXC/RMII1_CRS_DVpassive
B18GPIO0_73/RGMII1_TX_CTL/RMII1_TX_ENpassive
B19GPIO0_89/RGMII2_TD0/RMII2_TXD0/MCASP2_AXR6passive
B20GPIO1_18/SPI0_D0/CP_GEMAC_CPTS0_HW1TSPUSH/~{EHRPWM1_B}passive
B21GPIO1_17/SPI0_CLK/CP_GEMAC_CPTS0_TS_SYNC/EHRPWM1_Apassive
B22GPIO1_21/UART0_TXD/ECAP2_IN_APWM_OUT/SPI2_D1/~{EHRPWM2_B}passive
B23GPIO1_24/MCAN0_TX/UART5_RXD/TIMER_IO2/SYNC2_OUT/UART1_DTRn/EQEP2_I/MCASP2_AXR0/EHRPWM_TZn_IN3passive
B24GPIO1_29/I2C1_SDA/UART1_TXD/TIMER_IO1/SPI2_CLK/EHRPWM0_SYNCO/~{EHRPWM2_B}/MMC2_SDWPpassive
B25GPIO1_26/I2C0_SCL/SYNC0_OUT/OBSCLK1/UART1_DCDn/EQEP2_A/EHRPWM_SOCA/ECAP1_IN_APWM_OUT/SPI2_CS0passive
C10MCU_GPIO0_2/MCU_SPI0_CLKpassive
C11MCU_GPIO0_20/WKUP_I2C0_SDApassive
C13TCKpassive
C14TDOpassive
C16GPIO0_78/RGMII1_TD3/CLKOUT0passive
C17GPIO0_76/RGMII1_TD1/RMII1_TXD1passive
C19GPIO1_6/RGMII2_RD3/AUDIO_EXT_REFCLK0/~{EQEP2_B}passive
C20VSSpassive
C21GPIO1_19/SPI0_D1/CP_GEMAC_CPTS0_HW2TSPUSH/EHRPWM_TZn_IN0passive
C22GPIO1_23/UART0_RTSn/SPI0_CS3/I2C3_SDA/UART2_TXD/TIMER_IO7/AUDIO_EXT_REFCLK1/MCASP2_ACLKX/MMC2_SDWPpassive
C23GPIO1_31/EXTINTnpassive
C24GPIO1_28/I2C1_SCL/UART1_RXD/TIMER_IO0/SPI2_CS1/EHRPWM0_SYNCI/EHRPWM2_A/MMC2_SDCDpassive
C25GPIO1_30/SYSCLKOUT0/CLKOUT0/EXT/SYNC1/SPI2/TIMER/CP/ECAP0passive
D10MCU_GPIO0_4/MCU_SPI0_D1passive
D11MCU_GPIO0_18/MCU_I2C0_SDApassive
D13EMU1passive
D14VSSpassive
D16GPIO0_88/RGMII2_TXC/RMII2_CRS_DV/MCASP2_AXR5passive
D17GPIO0_91/RGMII2_TD2/MCASP2_AFSX/EQEP2_Ipassive
D19GPIO1_2/RGMII2_RXC/RMII2_REF_CLK/MCASP2_AXR1passive
D20GPIO1_15/SPI0_CS0/EHRPWM0_Apassive
D23GPIO1_48/MMC1_SDCD/UART6_RXD/TIMER_IO6/UART3_RTSn/MCAN1_TX/SPI1_CS3/SPI2_CLKpassive
D24GPIO1_49/MMC1_SDWP/UART6_TXD/TIMER_IO7/UART3_CTSn/MCAN1_RX/SPI1_CS1passive
D25GPIO1_7/MCASP0_AXR3/SPI2_D0/UART1_CTSn/UART6_RXD/ECAP1_IN_APWM_OUT/EQEP0_Apassive
E10MCU_GPIO0_1/MCU_SPI0_CS1/MCU_OBSCLK0/MCU_SYSCLKOUT0/MCU_EXT_REFCLK0/MCU_TIMER_IO1passive
E11MCU_GPIO0_17/MCU_I2C0_SCLpassive
E13TDIpassive
E14TMSpassive
E16GPIO1_4/RGMII2_RD1/RMII2_RXD1/MCASP2_AFSR/MCASP2_AXR7passive
E17GPIO1_5/RGMII2_RD2/MCASP2_AXR0/EQEP2_Apassive
E19GPIO1_3/RGMII2_RD0/RMII2_RXD0/MCASP2_AXR2passive
E20GPIO1_16/SPI0_CS1/CP_GEMAC_CPTS0_TS_COMP/~{EHRPWM0_B}/ECAP0_IN_APWM_OUT/MAIN_ERRORn/EHRPWM_TZn_IN5passive
E24GPIO1_9/MCASP0_AXR1/SPI2_CS2/ECAP1_IN_APWM_OUT/MAIN_ERRORn/EHRPWM1_A/EQEP0_Spassive
E25GPIO1_8/MCASP0_AXR2/SPI2_D1/UART1_RTSn/UART6_TXD/ECAP2_IN_APWM_OUT/~{EQEP0_B}passive
F11~{MCU_RESET}passive
F13MCU_GPIO0_23/WKUP_CLKOUT0passive
F14MCU_GPIO0_21/MCU_RESETSTATzpassive
F16GPIO0_85/MDIO0_MDIOpassive
F17GPIO0_86/MDIO0_MDCpassive
F19GPIO1_1/RGMII2_RX_CTL/RMII2_RX_ER/MCASP2_AXR3passive
F20GPIO1_25/MCAN0_RX/UART5_TXD/TIMER_IO3/SYNC3_OUT/UART1_RIn/EQEP2_S/MCASP2_AXR1/EHRPWM_TZn_IN4passive
F23GPIO1_10/MCASP0_AXR0/AUDIO_EXT_REFCLK0/~{EHRPWM1_B}/EQEP0_Ipassive
F24GPIO1_11/MCASP0_ACLKX/SPI2_CS1/ECAP2_IN_APWM_OUT/EQEP1_Apassive
F25GPIO1_12/MCASP0_AFSX/SPI2_CS3/AUDIO_EXT_REFCLK1/~{EQEP1_B}passive
G20GPIO1_14/MCASP0_ACLKR/SPI2_CLK/UART1_TXD/~{EHRPWM0_B}/EQEP1_Ipassive
G21GPIO1_51/USB1_DRVVBUSpassive
G22GPIO1_50/USB0_DRVVBUSpassive
G23GPIO1_13/MCASP0_AFSR/SPI2_CS0/UART1_RXD/EHRPWM0_A/EQEP1_Spassive
G24~{RESET_REQ}passive
G25~{RESETSTAT}passive
H20GPIO1_47/MMC1_CMD/TIMER_IO5/UART3_TXD/SPI1_CLK/SPI2_CS0passive
H21GPIO1_45/MMC1_DAT0/CP_GEMAC_CPTS0_HW2TSPUSH/TIMER_IO3/UART2_CTSn/ECAP2_IN_APWM_OUT/SPI2_D1passive
H22GPIO1_43/MMC1_DAT2/CP_GEMAC_CPTS0_TS_SYNC/TIMER_IO1/UART2_TXD/MCAN1_RX/SPI1_D1/SPI2_CS3passive
H23GPIO1_44/MMC1_DAT1/CP_GEMAC_CPTS0_HW1TSPUSH/TIMER_IO2/UART2_RTSn/ECAP1_IN_APWM_OUT/SPI1_CS2/SPI2_D0passive
H24~{POR_OUT}passive
H25GPIO1_42/MMC1_DAT3/CP_GEMAC_CPTS0_TS_COMP/TIMER_IO0/UART2_RXD/MCAN1_TX/SPI1_D0/SPI2_CS1passive
J24GPIO1_46/MMC1_CLK/TIMER_IO4/UART3_RXD/SPI1_CS0/SPI2_CS2passive
J25GPIO0_71/MMC2_SDCD/MCASP1_ACLKX/UART4_RXD/EHRPWM2_A/EHRPWM_TZn_IN1passive
K20VDDA_TEMP1passive
K21GPIO0_69/MMC2_CLK/MCASP1_ACLKR/MCASP1_AXR5/UART6_RXD/EHRPWM0_SYNCI/I2C3_SCLpassive
K22GPIO0_67/MMC2_DAT1/MCASP1_AXR1/EHRPWM1_A/I2C2_SDApassive
K23GPIO0_68/MMC2_DAT0/MCASP1_AXR0/~{EHRPWM1_B}/I2C2_SCLpassive
K24GPIO0_70/MMC2_CMD/MCASP1_AFSR/MCASP1_AXR4/UART6_TXD/EHRPWM0_SYNCO/EHRPWM_TZn_IN0/I2C3_SDApassive
K25GPIO0_72/MMC2_SDWP/MCASP1_AFSX/UART4_TXD/~{EHRPWM2_B}/EHRPWM_TZn_IN2passive
L20GPIO0_66/MMC2_DAT2/MCASP1_AXR2/UART5_TXD/~{EHRPWM0_B}/I2C2_SDApassive
L21GPIO0_65/MMC2_DAT3/MCASP1_AXR3/UART5_RXD/EHRPWM0_Apassive
L22GPIO0_13/OSPI0_CSn2/SPI1_CS1/OSPI0_RESET_OUT1/MCASP1_AFSR/MCASP1_AXR2/UART5_RXDpassive
L23GPIO0_14/OSPI0_CSn3/OSPI0_RESET_OUT0/OSPI0_ECC_FAIL/MCASP1_ACLKR/MCASP1_AXR3/UART5_TXDpassive
L24GPIO0_12/OSPI0_CSn1passive
L25GPIO0_3/OSPI0_D0passive
M24GPIO0_6/OSPI0_D3passive
M25GPIO0_11/OSPI0_CSn0passive
N20GPIO0_10/OSPI0_D7/SPI1_D1/MCASP1_AFSX/UART6_CTSnpassive
N21GPIO0_7/OSPI0_D4/SPI1_CS0/MCASP1_AXR1/UART6_RXDpassive
N22GPIO0_8/OSPI0_D5/SPI1_CLK/MCASP1_AXR0/UART6_TXDpassive
N23GPIO0_1/OSPI0_LBCLKO/UART5_RTSnpassive
N24GPIO0_4/OSPI0_D1passive
N25GPIO0_5/OSPI0_D2passive
P20VSSpassive
P21GPIO0_9/OSPI0_D6/SPI1_D0/MCASP1_ACLKX/UART6_RTSnpassive
P22GPIO0_2/OSPI0_DQS/UART5_CTSnpassive
P23GPIO0_0/OSPI0_CLKpassive
P24GPIO0_39/GPMC0_WPn/AUDIO_EXT_REFCLK1/GPMC0_A22/UART6_TXD/TRC_DATA13passive
P25GPIO0_40/GPMC0_DIR/MCASP2_AXR13/MAIN_ERRORn/TRC_DATA14/EQEP2_Spassive
R24GPIO0_33/GPMC0_OEn_REn/MCASP1_AXR1/TRC_DATA8passive
R25GPIO0_32/GPMC0_ADVn_ALE/MCASP1_AXR2/TRC_DATA7passive
T20GPIO0_19/GPMC0_AD4/MCASP2_AXR8/TRC_DATA2passive
T21GPIO0_20/GPMC0_AD5/MCASP2_AXR9/TRC_DATA3passive
T22GPIO0_43/GPMC0_CSn2/I2C2_SCL/MCASP1_AXR4/UART4_RXD/MCAN1_TX/TRC_DATA17/MCASP1_AFSRpassive
T23GPIO0_41/GPMC0_CSn0/MCASP2_AXR14/TRC_DATA15passive
T24~{GPIO0_36}/~{GPMC0_BE1n}/MCASP2_AXR12/TRC_DATA11passive
T25GPIO0_34/GPMC0_WEn/MCASP1_AXR0/TRC_DATA9passive
U20GPIO0_17/GPMC0_AD2/MCASP2_AXR6/TRC_DATA0passive
U21GPIO0_16/GPMC0_AD1/MCASP2_AXR5/TRC_CTLpassive
U22GPIO0_15/GPMC0_AD0/MCASP2_AXR4/TRC_CLKpassive
U23GPIO0_42/GPMC0_CSn1/MCASP2_AXR15/TRC_DATA16passive
U24~{GPIO0_35}/~{GPMC0_BE0n_CLE}/MCASP1_ACLKX/TRC_DATA10passive
U25GPIO0_44/GPMC0_CSn3/I2C2_SDA/GPMC0_A20/UART4_TXD/MCASP1_AXR5/MCAN1_RX/TRC_DATA18/MCASP1_ACLKRpassive
V24GPIO0_21/GPMC0_AD6/MCASP2_AXR10/TRC_DATA4passive
V25GPIO0_18/GPMC0_AD3/MCASP2_AXR7/TRC_DATA1passive
W20GPIO0_63/VOUT0_VSYNC/GPMC0_A18/UART2_RTSnpassive
W21GPIO0_62/VOUT0_DE/GPMC0_A17/UART3_CTSnpassive
W22GPIO0_55/VOUT0_DATA10/GPMC0_A10/UART6_RTSnpassive
W23GPIO0_46/VOUT0_DATA1/GPMC0_A1/UART2_TXDpassive
W24GPIO0_26/GPMC0_AD11/VOUT0_DATA19/UART3_TXD/MCASP2_AXR3/TRC_DATA23passive
W25GPIO0_22/GPMC0_AD7/MCASP2_AXR11/TRC_DATA5passive
Y10USB1_VBUSpassive
Y11VDDA_3P3_USBpassive
Y16DSI0_TXRCALIBpassive
Y20GPIO0_60/VOUT0_DATA15/GPMC0_A15/UART4_CTSnpassive
Y21GPIO0_64/VOUT0_PCLK/GPMC0_A19/UART2_CTSnpassive
Y23GPIO0_48/VOUT0_DATA3/GPMC0_A3/UART3_TXD/AUDIO_EXT_REFCLK0passive
Y24GPIO0_27/GPMC0_AD12/VOUT0_DATA20/UART4_RXD/MCASP2_AFSX/TRC_DATA22passive
Y25GPIO0_31/GPMC0_CLK/MCASP1_AXR3/GPMC0_FCLK_MUX/TRC_DATA6passive
1A10VMON_1P8_SOCpassive
1B10VDDSHV6passive
1C10CAP_VDDS1passive
1D10VDDSHV1passive
1E10VDDSHV3passive
1F10CAP_VDDS3passive
1G10VDDSHV3passive
1H10VDD_COREpassive
1J10VSSpassive
1K10VDDA_1P8_OLDI0passive
AA10CSI0_RXN2passive
AA12DSI0_TXCLKNpassive
AA13DSI0_TXCLKPpassive
AA15CSI0_RXRCALIBpassive
AA16OLDI0_A7Ppassive
AA19OLDI0_A2Npassive
AA20GPIO0_59/VOUT0_DATA14/GPMC0_A14/UART4_RTSnpassive
AA21VSSpassive
AA23GPIO0_47/VOUT0_DATA2/GPMC0_A2/UART3_RXDpassive
AA24GPIO0_37/GPMC0_WAIT0/MCASP1_AFSX/TRC_DATA12passive
AA25GPIO0_25/GPMC0_AD10/VOUT0_DATA18/UART3_RXD/MCASP2_AXR2/OBSCLK0passive
AB10CSI0_RXP0passive
AB11CSI0_RXN0passive
AB13DSI0_TXN1passive
AB14DSI0_TXP1passive
AB16OLDI0_A7Npassive
AB17OLDI0_A5Npassive
AB19OLDI0_A2Ppassive
AB23GPIO0_49/VOUT0_DATA4/GPMC0_A4/UART4_RXD/EQEP2_Ipassive
AB24GPIO0_29/GPMC0_AD14/VOUT0_DATA22/UART5_RXD/MCASP2_AFSR/MCASP2_AXR4/TRC_DATA20/UART2_CTSnpassive
AB25GPIO0_24/GPMC0_AD9/VOUT0_DATA17/UART2_TXD/MCASP2_AXR1passive
AC10CSI0_RXN1passive
AC12DSI0_TXN2passive
AC13DSI0_TXP2passive
AC15OLDI0_A6Ppassive
AC16OLDI0_A6Npassive
AC17OLDI0_A5Ppassive
AC19OLDI0_A1Npassive
AC20GPIO0_61/VOUT0_HSYNC/GPMC0_A16/UART3_RTSnpassive
AC21GPIO0_58/VOUT0_DATA13/GPMC0_A13/UART5_CTSnpassive
AC22GPIO0_54/VOUT0_DATA9/GPMC0_A9/UART6_TXDpassive
AC23GPIO0_51/VOUT0_DATA6/GPMC0_A6/UART5_RXD/EQEP2_Apassive
AC24GPIO0_30/GPMC0_AD15/VOUT0_DATA23/UART5_TXD/MCASP2_ACLKR/MCASP2_AXR5/TRC_DATA19/UART2_RTSnpassive
AC25GPIO0_23/GPMC0_AD8/VOUT0_DATA16/UART2_RXD/MCASP2_AXR0passive
AD11DSI0_TXN0passive
AD12DSI0_TXP0passive
AD14OLDI0_CLK1Ppassive
AD15OLDI0_CLK1Npassive
AD16OLDI0_A4Ppassive
AD17OLDI0_A4Npassive
AD18OLDI0_A3Npassive
AD19OLDI0_A1Ppassive
AD20OLDI0_A0Ppassive
AD21GPIO0_57/VOUT0_DATA12/GPMC0_A12/UART5_RTSnpassive
AD22VSSpassive
AD23GPIO0_50/VOUT0_DATA5/GPMC0_A5/UART4_TXD/EQEP2_Spassive
AD24GPIO0_38/GPMC0_WAIT1/VOUT0_EXTPCLKIN/GPMC0_A21/UART6_RXD/EQEP2_Ipassive
AD25GPIO0_28/GPMC0_AD13/VOUT0_DATA21/UART4_TXD/MCASP2_ACLKX/TRC_DATA21passive
AE10USB1_DMpassive
AE11CSI0_RXCLKPpassive
AE12CSI0_RXCLKNpassive
AE13VSSpassive
AE14DSI0_TXN3passive
AE15DSI0_TXP3passive
AE16VSSpassive
AE17OLDI0_CLK0Ppassive
AE18OLDI0_CLK0Npassive
AE19OLDI0_A3Ppassive
AE20OLDI0_A0Npassive
AE21GPIO0_56/VOUT0_DATA11/GPMC0_A11/UART6_CTSnpassive
AE22GPIO0_53/VOUT0_DATA8/GPMC0_A8/UART6_RXDpassive
AE23GPIO0_52/VOUT0_DATA7/GPMC0_A7/UART5_TXD/~{EQEP2_B}passive
AE24GPIO0_45/VOUT0_DATA0/GPMC0_A0/UART2_RXDpassive
AE25VSSpassive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed