Get Trace

TI AM62x ALW

celestial-altium-MPU_TI

Symbol

416 pins
Schematic symbol for TI AM62x ALW
Units
7
Kind
part
Grid
on 1.27 mm

Footprint

none
no footprint linked

This symbol carries no usable footprint reference, so nothing is linked. Generating one is a better answer than guessing.

3D model

none
no 3D model

The footprint references no model, or the referenced model is not in the upstream package set.

Pins and pads

No footprint is linked, so there is nothing to cross-check.

PinNameType
A1VSSpassive
A3MCU_OSC0_XOpassive
A4MCU_GPIO0_12/WKUP_UART0_RTSn/WKUP_TIMER_IO1/MCU_SPI1_CLKpassive
A5MCU_GPIO0_6/MCU_UART0_TXDpassive
A6MCU_GPIO0_7/MCU_UART0_CTSn/MCU_TIMER_IO0/MCU_SPI1_D0passive
A7MCU_GPIO0_2/MCU_SPI0_CLKpassive
A8MCU_GPIO0_17/MCU_I2C0_SCLpassive
A9MCU_GPIO0_20/WKUP_I2C0_SDApassive
B2MCU_OSC0_XIpassive
B3MCU_GPIO0_14/MCU_MCAN0_RX/MCU_TIMER_IO0/MCU_SPI1_CS3passive
B4MCU_GPIO0_9/WKUP_UART0_RXD/MCU_SPI0_CS2passive
B5MCU_GPIO0_5/MCU_UART0_RXDpassive
B6MCU_GPIO0_8/MCU_UART0_RTSn/MCU_TIMER_IO1/MCU_SPI1_D1passive
B7MCU_GPIO0_22/PMIC_LPM_EN0passive
B8MCU_GPIO0_1/MCU_SPI0_CS1/MCU_OBSCLK0/MCU_SYSCLKOUT0/MCU_EXT_REFCLK0/MCU_TIMER_IO1passive
B9MCU_GPIO0_19/WKUP_I2C0_SCLpassive
C1WKUP_LFOSC0_XOpassive
C2WKUP_LFOSC0_XIpassive
C5MCU_GPIO0_10/WKUP_UART0_TXD/MCU_SPI1_CS2passive
C6MCU_GPIO0_11/WKUP_UART0_CTSn/WKUP_TIMER_IO0/MCU_SPI1_CS0passive
C9MCU_GPIO0_4/MCU_SPI0_D1passive
D1~{MCU_ERROR}passive
D2~{MCU_POR}passive
D4MCU_GPIO0_16/MCU_MCAN1_RX/MCU_TIMER_IO3/MCU_SPI0_CS2/MCU_SPI1_CS2/MCU_SPI1_CLKpassive
D6MCU_GPIO0_13/MCU_MCAN0_TX/WKUP_TIMER_IO0/MCU_SPI0_CS3passive
D9MCU_GPIO0_3/MCU_SPI0_D0passive
E1DDR0_DQS0_Ppassive
E2DDR0_DQS0_Npassive
E3DDR0_DQ4passive
E5MCU_GPIO0_15/MCU_MCAN1_TX/MCU_TIMER_IO2/MCU_SPI1_CS1/MCU_EXT_REFCLK0passive
E8MCU_GPIO0_0/MCU_SPI0_CS0/WKUP_TIMER_IO1passive
F1DDR0_DQ7passive
F2DDR0_DQ6passive
F3DDR0_DQ2passive
F4DDR0_DQ0passive
F8VDD_CANUARTpassive
G1~{DDR0_RESET0}passive
G2DDR0_DQ5passive
G5DDR0_DQ1passive
G7VDDS_OSC0passive
G9CAP_VDDS_CANUARTpassive
H1DDR0_ODT0passive
H2DDR0_CKE0passive
H5DDR0_DM0passive
H6DDR0_DQ3passive
H8VDD_COREpassive
H9VDDSHV_CANUART_1passive
J1DDR0_A0passive
J2DDR0_A1passive
J3DDR0_ODT1passive
J4DDR0_CKE1passive
J7VSSpassive
J8VPPpassive
K1DDR0_A5passive
K2~{DDR0_CS1}passive
K3DDR0_A2passive
K4DDR0_A4passive
K7VSSpassive
K9VDDS_DDRpassive
L1DDR0_CK0_Ppassive
L2DDR0_CK0_Npassive
L5DDR0_A3passive
L6~{DDR0_CS0}passive
L8VDDS_DDRpassive
M1~{DDR0_BA0}passive
M2DDR0_CAL0passive
M4~{DDR0_CAS}passive
M5~{DDR0_RAS}passive
M7VSSpassive
M8VSSpassive
M9VDDS_DDRpassive
N1~{DDR0_BA1}passive
N2~{DDR0_BG1}passive
N3~{DDR0_WE}passive
N6~{DDR0_ACT}passive
N8VDD_COREpassive
P1DDR0_A8passive
P2DDR0_A7passive
P4DDR0_A9passive
P5DDR0_A11passive
P7VSSpassive
P9VDDS_DDRpassive
R1DDR0_A13passive
R2DDR0_A6passive
R3~{DDR0_ALERT}passive
R5DDR0_A10passive
R6DDR0_A12passive
R8VDDS_DDRpassive
T1DDR0_PARpassive
T4~{DDR0_BG0}passive
T7VDDSHV4passive
T8VSSpassive
T9VDDA_TEMP0passive
U1DDR0_DQ8passive
U2DDR0_DQ10passive
U3DDR0_DQ9passive
U7CAP_VDDS4passive
U8VSSpassive
V1DDR0_DQS1_Ppassive
V2DDR0_DQS1_Npassive
V5DDR0_DQ11passive
V6DDR0_DQ13passive
V8VDD_COREpassive
V9VSSpassive
W1DDR0_DQ15passive
W2DDR0_DQ12passive
W5DDR0_DM1passive
W7VSSpassive
W9VDDA_1P8_OLDI0passive
Y1DDR0_DQ14passive
Y2VSSpassive
Y3GPIO1_41/MMC0_CMD/I2C3_SDA/~{EHRPWM2_B}/PR0_PRU0_GPO4/PR0_PRU0_GPI4/SPI1_CS2/TIMER_IO5passive
Y4GPIO1_36/MMC0_DAT3/UART3_RXD/~{EHRPWM0_B}/PR0_PRU0_GPO0/PR0_PRU0_GPI0/SPI1_CS0/SPI2_CS2passive
Y6OLDI0_A0Ppassive
Y8OLDI0_A2Npassive
A10TCKpassive
A11TDIpassive
A12MCU_GPIO0_23/WKUP_CLKOUT0passive
A13GPIO1_15/SPI0_CS0/EHRPWM0_A/PR0_ECAP0_SYNC_INpassive
A14GPIO1_17/SPI0_CLK/CP_GEMAC_CPTS0_TS_SYNC/EHRPWM1_Apassive
A15GPIO1_22/UART0/SPI0/I2C3/UART2/TIMER/AUDIO/PR0/MCASP2/MMC2passive
A16GPIO1_27/I2C0/PR0/SPI2/TIMER/UART1/EQEP2/EHRPWM/ECAP2passive
A17GPIO1_29/I2C1_SDA/UART1_TXD/TIMER_IO1/SPI2_CLK/EHRPWM0_SYNCO/~{EHRPWM2_B}/MMC2_SDWPpassive
A18GPIO1_30/SYSCLKOUT0/CLKOUT0/EXT/SYNC1/SPI2/TIMER/CP/ECAP0passive
A19GPIO1_8/MCASP0/SPI2/UART1/UART6/PR0/ECAP2/EQEP0passive
A20GPIO1_14/MCASP0_ACLKR/SPI2_CLK/UART1_TXD/~{EHRPWM0_B}/EQEP1_Ipassive
A21GPIO1_47/MMC1_CMD/TIMER_IO5/UART3_TXDpassive
A22GPIO1_45/MMC1_DAT0/CP_GEMAC_CPTS0_HW2TSPUSH/TIMER_IO3/UART2_CTSn/ECAP2_IN_APWM_OUTpassive
A23GPIO0_71/MMC2_SDCD/MCASP1_ACLKX/UART4_RXDpassive
A24VSSpassive
A25VSSpassive
AA1GPIO1_38/MMC0_DAT1/UART3_RTSn/~{EHRPWM1_B}/PR0_PRU0_GPO2/PR0_PRU0_GPI2/SPI1_CS3/SPI2_CS0passive
AA2GPIO1_39/MMC0_DAT0/UART3_CTSn/EHRPWM_TZn_IN1/PR0_PRU0_GPO3/PR0_PRU0_GPI3/SPI2_CLKpassive
AA3GPIO1_37/MMC0_DAT2/UART3_TXD/EHRPWM1_A/PR0_PRU0_GPO1/PR0_PRU0_GPI1/SPI1_CLK/TIMER_IO0passive
AA5OLDI0_A0Npassive
AA7OLDI0_A3Ppassive
AA8OLDI0_A2Ppassive
AB1GPIO1_40/MMC0_CLK/I2C3_SCL/EHRPWM2_A/PR0_PRU1_GPO4/PR0_PRU1_GPI4/SPI1_CS1/TIMER_IO4passive
AB2GPIO1_35/MMC0_DAT4/UART2_CTSn/EHRPWM0_A/PR0_PRU1_GPO3/PR0_PRU1_GPI3/SPI2_D1passive
AB4OLDI0_A1Ppassive
AB6OLDI0_A3Npassive
AB9VSSpassive
AC1GPIO1_34/MMC0_DAT5/UART2_RTSn/EHRPWM_TZn_IN2/PR0_PRU1_GPO2/PR0_PRU1_GPI2/SPI2_D0passive
AC2GPIO1_32/MMC0_DAT7/UART2_RXD/EHRPWM0_SYNCI/PR0_PRU1_GPO0/PR0_PRU1_GPI0/SPI1_D0/SPI2_CS1passive
AC5OLDI0_A4Ppassive
AC6OLDI0_A4Npassive
AC9USB1_RCALIBpassive
AD1VSSpassive
AD2GPIO1_33/MMC0_DAT6/UART2_TXD/EHRPWM0_SYNCO/PR0_PRU1_GPO1/PR0_PRU1_GPI1/SPI1_D1/SPI2_CS3passive
AD3OLDI0_A1Npassive
AD4OLDI0_CLK0Npassive
AD5OLDI0_CLK1Ppassive
AD6OLDI0_A5Ppassive
AD7OLDI0_A6Ppassive
AD8OLDI0_A7Npassive
AD9VSSpassive
AE1VSSpassive
AE3OLDI0_CLK0Ppassive
AE4OLDI0_CLK1Npassive
AE5OLDI0_A5Npassive
AE6OLDI0_A6Npassive
AE7OLDI0_A7Ppassive
AE8VSSpassive
AE9USB1_DPpassive
B10~{TRST}passive
B11TMSpassive
B12MCU_GPIO0_21/MCU_RESETSTATzpassive
B13GPIO1_18/SPI0_D0/CP_GEMAC_CPTS0_HW1TSPUSH/~{EHRPWM1_B}passive
B14GPIO1_19/SPI0_D1/CP_GEMAC_CPTS0_HW2TSPUSH/EHRPWM_TZn_IN0passive
B15GPIO1_23/UART0/SPI0/I2C3/UART2/TIMER/AUDIO/PR0/MCASP2/MMC2passive
B16GPIO1_26/OBSCLK0/I2C0/PR0/SYNC0/UART1/EQEP2/EHRPWM/ECAP1/SPI2passive
B17GPIO1_28/I2C1_SCL/UART1_RXD/TIMER_IO0/SPI2_CS1/EHRPWM0_SYNCI/EHRPWM2_A/MMC2_SDCDpassive
B18GPIO1_9/MCASP0_AXR1/SPI2_CS2/ECAP1_IN_APWM_OUT/PR0_UART0_RXD/EHRPWM1_A/EQEP0_Spassive
B19GPIO1_7/MCASP0/SPI2/UART1/UART6/PR0/ECAP1/EQEP0passive
B20GPIO1_11/MCASP0_ACLKX/SPI2_CS1/ECAP2_IN_APWM_OUT/EQEP1_Apassive
B21GPIO1_44/MMC1_DAT1/CP_GEMAC_CPTS0_HW1TSPUSH/TIMER_IO2/UART2_RTSn/ECAP1_IN_APWM_OUTpassive
B22GPIO1_46/MMC1_CLK/TIMER_IO4/UART3_RXDpassive
B23GPIO0_72/MMC2_SDWP/MCASP1_AFSX/UART4_TXDpassive
B24GPIO0_68/MMC2_DAT0/MCASP1_AXR0passive
B25VSSpassive
C11EMU1passive
C13GPIO1_16/SPI0_CS1/CP_GEMAC_CPTS0_TS_COMP/~{EHRPWM0_B}/ECAP0_IN_APWM_OUT/EHRPWM_TZn_IN5passive
C15GPIO1_24/MCAN0/UART5/TIMER/SYNC2/UART1/EQEP2/PR0/MCASP2/EHRPWMpassive
C17GPIO1_49/MMC1_SDWP/UART6_TXD/TIMER_IO7/UART3_CTSnpassive
C20GPIO1_50/USB0_DRVVBUSpassive
C21GPIO1_43/MMC1_DAT2/CP_GEMAC_CPTS0_TS_SYNC/TIMER_IO1/UART2_TXDpassive
C24GPIO0_70/MMC2_CMD/MCASP1_AFSR/MCASP1_AXR4/UART6_TXDpassive
C25GPIO0_67/MMC2_DAT1/MCASP1_AXR1passive
D10MCU_GPIO0_18/MCU_I2C0_SDApassive
D12TDOpassive
D14GPIO1_20/UART0_RXD/ECAP1_IN_APWM_OUT/SPI2_D0/EHRPWM2_Apassive
D16GPIO1_31/EXTINTnpassive
D17GPIO1_48/MMC1_SDCD/UART6_RXD/TIMER_IO6/UART3_RTSnpassive
D20GPIO1_12/MCASP0_AFSX/SPI2_CS3/AUDIO_EXT_REFCLK1/~{EQEP1_B}passive
D22GPIO1_42/MMC1_DAT3/CP_GEMAC_CPTS0_TS_COMP/TIMER_IO0/UART2_RXDpassive
D24GPIO0_65/MMC2_DAT3/MCASP1_AXR3/UART5_RXDpassive
D25GPIO0_69/MMC2_CLK/MCASP1_ACLKR/MCASP1_AXR5/UART6_RXDpassive
E11~{MCU_RESET}passive
E12EMU0passive
E14GPIO1_21/UART0_TXD/ECAP2_IN_APWM_OUT/SPI2_D1/~{EHRPWM2_B}passive
E15GPIO1_25/MCAN0/UART5/TIMER/SYNC3/UART1/EQEP2/PR0/MCASP2/EHRPWMpassive
E18GPIO1_10/MCASP0_AXR0/PR0_ECAP0_IN_APWM_OUT/AUDIO_EXT_REFCLK0/PR0_UART0_TXD/~{EHRPWM1_B}/EQEP0_Ipassive
E19GPIO1_13/MCASP0_AFSR/SPI2_CS0/UART1_RXD/EHRPWM0_A/EQEP1_Spassive
E21~{POR_OUT}passive
E23GPIO0_66/MMC2_DAT2/MCASP1_AXR2/UART5_TXDpassive
E24GPIO0_14/OSPI0_CSn3/OSPI0_RESET_OUT0/OSPI0_ECC_FAIL/MCASP1_ACLKR/MCASP1_AXR3/UART5_TXDpassive
E25GPIO0_3/OSPI0_D0passive
F11VDDSHV_MCUpassive
F13VSSpassive
F15VDDSHV0passive
F18GPIO1_51/USB1_DRVVBUSpassive
F20~{RESET_REQ}passive
F22~{RESETSTAT}passive
F23GPIO0_11/OSPI0_CSn0passive
F24GPIO0_6/OSPI0_D3passive
F25GPIO0_5/OSPI0_D2passive
G10VMON_1P8_SOCpassive
G12VDDSHV_MCUpassive
G13VSSpassive
G14VDDSHV0passive
G16VDDA_TEMP1passive
G17VDDSHV5passive
G19VSSpassive
G21GPIO0_12/OSPI0_CSn1passive
G24GPIO0_4/OSPI0_D1passive
G25GPIO0_1/OSPI0_LBCLKO/UART5_RTSnpassive
H10VMON_VSYSpassive
H11CAP_VDDS_MCUpassive
H13VSSpassive
H15CAP_VDDS0passive
H16VSSpassive
H17CAP_VDDS5passive
H18VSSpassive
H20VSSpassive
H21GPIO0_13/OSPI0_CSn2/SPI1_CS1/OSPI0_RESET_OUT1/MCASP1_AFSR/MCASP1_AXR2/UART5_RXDpassive
H24GPIO0_0/OSPI0_CLKpassive
H25GPIO0_9/OSPI0_D6/SPI1_D0/MCASP1_ACLKX/UART6_RTSnpassive
J11VDD_COREpassive
J12VDDR_COREpassive
J13VSSpassive
J14VDD_COREpassive
J18VDDSHV6passive
J19CAP_VDDS6passive
J22GPIO0_10/OSPI0_D7/SPI1_D1/MCASP1_AFSX/UART6_CTSnpassive
J23GPIO0_7/OSPI0_D4/SPI1_CS0/MCASP1_AXR1/UART6_RXDpassive
J24GPIO0_2/OSPI0_DQS/UART5_CTSnpassive
J25GPIO0_8/OSPI0_D5/SPI1_CLK/MCASP1_AXR0/UART6_TXDpassive
K10VMON_3P3_SOCpassive
K13VSSpassive
K15VSSpassive
K16VDDR_COREpassive
K17VDD_COREpassive
K18CAP_VDDS1passive
K19VSSpassive
K22GPIO0_43/GPMC0/I2C2/MCASP1/UART4/PR0/TRCpassive
K24GPIO0_44/GPMC0_CSn3/I2C2_SDA/GPMC0_A20/UART4_TXD/MCASP1_AXR5/TRC_DATA18/MCASP1_ACLKRpassive
K25GPIO0_39/GPMC0_WPn/AUDIO_EXT_REFCLK1/GPMC0_A22/UART6_TXD/PR0_PRU0_GPO15/PR0_PRU0_GPI15/TRC_DATA13passive
L11VDDA_MCUpassive
L12VDD_COREpassive
L14VDDA_PLL2passive
L15VDD_COREpassive
L18VDDSHV1passive
L20VSSpassive
L21GPIO0_42/GPMC0/PR0/MCASP2/TRCpassive
L23GPIO0_32/GPMC0_ADVn_ALE/MCASP1_AXR2/PR0_PRU0_GPO9/PR0_PRU0_GPI9/TRC_DATA7passive
L24GPIO0_33/GPMC0_OEn_REn/MCASP1_AXR1/PR0_PRU0_GPO10/PR0_PRU0_GPI10/TRC_DATA8passive
L25GPIO0_34/GPMC0_WEn/MCASP1_AXR0/PR0_PRU0_GPO11/PR0_PRU0_GPI11/TRC_DATA9passive
M10VSSpassive
M12VSSpassive
M13VSSpassive
M16VDD_COREpassive
M17VSSpassive
M18VSSpassive
M19VDDSHV1passive
M21GPIO0_41/GPMC0_CSn0/MCASP2_AXR14/PR0_PRU0_GPO17/PR0_PRU0_GPI17/TRC_DATA15passive
M22GPIO0_40/GPMC0/PR0/MCASP2/TRC/EQEP2passive
M24~{GPIO0_35}/~{GPMC0_BE0n_CLE}/MCASP1_ACLKX/PR0_PRU0_GPO12/PR0_PRU0_GPI12/TRC_DATA10passive
M25GPIO0_15/GPMC0_AD0/PR0_PRU1_GPO8/PR0_PRU1_GPI8/MCASP2_AXR4/PR0_PRU0_GPO0/PR0_PRU0_GPI0/TRC_CLKpassive
N11VDD_COREpassive
N12VDDR_COREpassive
N13VDD_COREpassive
N14VDDR_COREpassive
N15VSSpassive
N18VDDSHV3passive
N20~{GPIO0_36}/~{GPMC0_BE1n}/MCASP2_AXR12/PR0_PRU0_GPO13/PR0_PRU0_GPI13/TRC_DATA11passive
N23GPIO0_16/GPMC0_AD1/PR0_PRU1_GPO9/PR0_PRU1_GPI9/MCASP2_AXR5/PR0_PRU0_GPO1/PR0_PRU0_GPI1/TRC_CTLpassive
N24GPIO0_17/GPMC0_AD2/PR0_PRU1_GPO10/PR0_PRU1_GPI10/MCASP2_AXR6/PR0_PRU0_GPO2/PR0_PRU0_GPI2/TRC_DATA0passive
N25GPIO0_18/GPMC0_AD3/PR0_PRU1_GPO11/PR0_PRU1_GPI11/MCASP2_AXR7/PR0_PRU0_GPO3/PR0_PRU0_GPI3/TRC_DATA1passive
P10VSSpassive
P13VSSpassive
P16VDDR_COREpassive
P17VDD_COREpassive
P18VDDSHV3passive
P19CAP_VDDS3passive
P21GPIO0_21/GPMC0_AD6/PR0_PRU1_GPO14/PR0_PRU1_GPI14/MCASP2_AXR10/PR0_PRU0_GPO6/PR0_PRU0_GPI6/TRC_DATA4passive
P22GPIO0_20/GPMC0_AD5/PR0_PRU1_GPO13/PR0_PRU1_GPI13/MCASP2_AXR9/PR0_PRU0_GPO5/PR0_PRU0_GPI5/TRC_DATA3passive
P24GPIO0_19/GPMC0_AD4/PR0_PRU1_GPO12/PR0_PRU1_GPI12/MCASP2_AXR8/PR0_PRU0_GPO4/PR0_PRU0_GPI4/TRC_DATA2passive
P25GPIO0_31/GPMC0_CLK/MCASP1_AXR3/GPMC0_FCLK_MUX/PR0_PRU0_GPO8/PR0_PRU0_GPI8/TRC_DATA6passive
R11VDD_COREpassive
R12VDDR_COREpassive
R13VSSpassive
R14VDD_COREpassive
R15VSSpassive
R18VSSpassive
R20VSSpassive
R21GPIO0_26/GPMC0_AD11/VOUT0_DATA19/UART3_TXD/MCASP2_AXR3/PR0_PRU1_GPO3/PR0_PRU1_GPI3/TRC_DATA23passive
R23GPIO0_22/GPMC0_AD7/PR0_PRU1_GPO15/PR0_PRU1_GPI15/MCASP2_AXR11/PR0_PRU0_GPO7/PR0_PRU0_GPI7/TRC_DATA5passive
R24GPIO0_23/GPMC0_AD8/VOUT0_DATA16/UART2_RXD/MCASP2_AXR0/PR0_PRU1_GPO0/PR0_PRU1_GPI0passive
R25GPIO0_24/GPMC0_AD9/VOUT0_DATA17/UART2_TXD/MCASP2_AXR1/PR0_PRU1_GPO1/PR0_PRU1_GPI1passive
T10VDDR_COREpassive
T13VSSpassive
T14VSSpassive
T16VSSpassive
T17VSSpassive
T18VSSpassive
T19VDDSHV3passive
T22GPIO0_27/GPMC0_AD12/VOUT0_DATA20/UART4_RXD/MCASP2_AFSX/PR0_PRU0_GPO0/PR0_PRU0_GPI0/TRC_DATA22passive
T24GPIO0_28/GPMC0_AD13/VOUT0_DATA21/UART4_TXD/MCASP2_ACLKX/PR0_PRU0_GPO1/PR0_PRU0_GPI1/TRC_DATA21passive
T25GPIO0_25/GPMC0_AD10/VOUT0_DATA18/UART3_RXD/MCASP2_AXR2/PR0_PRU1_GPO2/PR0_PRU1_GPI2/OBSCLK0passive
U11VDDA_PLL0passive
U12VDD_COREpassive
U14VDDR_COREpassive
U15VDDA_PLL1passive
U18VDDSHV3passive
U19VSSpassive
U22GPIO0_45/VOUT0_DATA0/GPMC0_A0/PR0_PRU1_GPO0/PR0_PRU1_GPI0/UART2_RXD/PR0_PRU0_GPO8/PR0_PRU0_GPI8passive
U23GPIO0_37/GPMC0_WAIT0/MCASP1_AFSX/PR0_PRU0_GPO14/PR0_PRU0_GPI14/TRC_DATA12passive
U24GPIO0_30/GPMC0/VOUT0/UART5/MCASP2/PR0/TRC/UART2passive
U25GPIO0_29/GPMC0/VOUT0/UART5/MCASP2/PR0/TRC/UART2passive
V10VSSpassive
V11VSSpassive
V13VSSpassive
V15VDD_COREpassive
V16VSSpassive
V17VDD_COREpassive
V18VSSpassive
V20GPIO0_55/VOUT0_DATA10/GPMC0_A10/PR0_PRU1_GPO9/PR0_PRU1_GPI9/UART6_RTSn/PR0_PRU0_GPO0/PR0_PRU0_GPI0passive
V21GPIO0_53/VOUT0_DATA8/GPMC0_A8/PR0_PRU1_GPO16/PR0_PRU1_GPI16/UART6_RXD/PR0_PRU0_GPO17/PR0_PRU0_GPI17passive
V24GPIO0_46/VOUT0_DATA1/GPMC0_A1/PR0_PRU1_GPO1/PR0_PRU1_GPI1/UART2_TXD/PR0_PRU0_GPO9/PR0_PRU0_GPI9passive
V25GPIO0_38/GPMC0_WAIT1/VOUT0_EXTPCLKIN/GPMC0_A21/UART6_RXD/EQEP2_Ipassive
W10VDDA_1P8_OLDI0passive
W12VDDA_CORE_USBpassive
W13VDDA_CORE_CSIRX0passive
W14VDDA_1P8_CSIRX0passive
W16VDDSHV2passive
W17CAP_VDDS2passive
W19VDDSHV2passive
W21GPIO0_54/VOUT0_DATA9/GPMC0_A9/PR0_PRU1_GPO8/PR0_PRU1_GPI8/UART6_TXD/PR0_PRU0_GPO16/PR0_PRU0_GPI16passive
W24GPIO0_48/VOUT0_DATA3/GPMC0_A3/PR0_PRU1_GPO3/PR0_PRU1_GPI3/UART3_TXD/PR0_PRU0_GPO11/PR0_PRU0_GPI11passive
W25GPIO0_47/VOUT0_DATA2/GPMC0_A2/PR0_PRU1_GPO2/PR0_PRU1_GPI2/UART3_RXD/PR0_PRU0_GPO10/PR0_PRU0_GPI10passive
Y11VDDA_1P8_USBpassive
Y13VDDA_3P3_USBpassive
Y18GPIO0_89/RGMII2_TD0/RMII2_TXD0/MCASP2_AXR6/PR0_PRU1_GPO2/PR0_PRU1_GPI2passive
Y20GPIO0_62/VOUT0_DE/GPMC0_A17/PR0_PRU1_GPO17/PR0_PRU1_GPI17/UART3_CTSn/PR0_PRU0_GPO7/PR0_PRU0_GPI7passive
Y22GPIO0_59/VOUT0_DATA14/GPMC0_A14/PR0_PRU1_GPO13/PR0_PRU1_GPI13/UART4_RTSn/PR0_PRU0_GPO4/PR0_PRU0_GPI4passive
Y23GPIO0_51/VOUT0_DATA6/GPMC0_A6/PR0_PRU1_GPO6/PR0_PRU1_GPI6/UART5_RXD/PR0_PRU0_GPO14/PR0_PRU0_GPI14passive
Y24GPIO0_50/VOUT0_DATA5/GPMC0_A5/PR0_PRU1_GPO5/PR0_PRU1_GPI5/UART4_TXD/PR0_PRU0_GPO13/PR0_PRU0_GPI13passive
Y25GPIO0_49/VOUT0_DATA4/GPMC0_A4/PR0_PRU1_GPO4/PR0_PRU1_GPI4/UART4_RXD/PR0_PRU0_GPO12/PR0_PRU0_GPI12passive
AA11VSSpassive
AA14CSI0_RXRCALIBpassive
AA15GPIO0_84/RGMII1_RD3passive
AA18GPIO0_90/RGMII2_TD1/RMII2_TXD1/MCASP2_ACLKR/PR0_PRU1_GPO3/PR0_PRU1_GPI3/MCASP2_AXR8passive
AA19GPIO0_87/RGMII2_TX_CTL/RMII2_TX_EN/MCASP2_AXR4/PR0_PRU1_GPO0/PR0_PRU1_GPI0passive
AA21GPIO0_60/VOUT0_DATA15/GPMC0_A15/PR0_PRU1_GPO14/PR0_PRU1_GPI14/UART4_CTSn/PR0_PRU0_GPO5/PR0_PRU0_GPI5passive
AA23GPIO0_56/VOUT0_DATA11/GPMC0_A11/PR0_PRU1_GPO10/PR0_PRU1_GPI10/UART6_CTSn/PR0_PRU0_GPO1/PR0_PRU0_GPI1passive
AA24GPIO0_58/VOUT0_DATA13/GPMC0_A13/PR0_PRU1_GPO12/PR0_PRU1_GPI12/UART5_CTSn/PR0_PRU0_GPO3/PR0_PRU0_GPI3passive
AA25GPIO0_52/VOUT0_DATA7/GPMC0_A7/PR0_PRU1_GPO7/PR0_PRU1_GPI7/UART5_TXD/PR0_PRU0_GPO15/PR0_PRU0_GPI15passive
AB10USB1_VBUSpassive
AB12CSI0_RXN3passive
AB14CSI0_RXN0passive
AB16GPIO0_83/RGMII1_RD2/PR0_UART0_RTSnpassive
AB17GPIO0_81/RGMII1_RD0/RMII1_RXD0passive
AB20GPIO1_4/RGMII2_RD1/RMII2_RXD1/MCASP2_AFSR/PR0_PRU0_GPO3/PR0_PRU0_GPI3/MCASP2_AXR7passive
AB22GPIO0_85/MDIO0_MDIOpassive
AB24GPIO0_61/VOUT0_HSYNC/GPMC0_A16/PR0_PRU1_GPO15/PR0_PRU1_GPI15/UART3_RTSn/PR0_PRU0_GPO6/PR0_PRU0_GPI6passive
AB25GPIO0_57/VOUT0_DATA12/GPMC0_A12/PR0_PRU1_GPO11/PR0_PRU1_GPI11/UART5_RTSn/PR0_PRU0_GPO2/PR0_PRU0_GPI2passive
AC11USB0_VBUSpassive
AC13CSI0_RXP3passive
AC15CSI0_RXP0passive
AC17GPIO0_82/RGMII1_RD1/RMII1_RXD1passive
AC20GPIO1_0/RGMII2/MCASP2/PR0/EQEP2passive
AC21GPIO1_5/RGMII2_RD2/MCASP2_AXR0/PR0_PRU0_GPO4/PR0_PRU0_GPI4/PR0_UART0_RXD/EQEP2_Apassive
AC24GPIO0_64/VOUT0/GPMC0/PR0/UART2passive
AC25GPIO0_63/VOUT0/GPMC0/PR0/UART2passive
AD10USB1_DMpassive
AD11USB0_DPpassive
AD12VSSpassive
AD13CSI0_RXN2passive
AD14CSI0_RXN1passive
AD15CSI0_RXCLKNpassive
AD16VSSpassive
AD17GPIO0_80/RGMII1_RXC/RMII1_REF_CLK/PR0_UART0_CTSnpassive
AD18GPIO0_78/RGMII1_TD3/PR0_UART0_TXDpassive
AD19GPIO0_73/RGMII1_TX_CTL/RMII1_TX_ENpassive
AD20GPIO0_76/RGMII1_TD1/RMII1_TXD1passive
AD21GPIO0_91/RGMII2_TD2/MCASP2_AFSX/PR0_PRU1_GPO4/PR0_PRU1_GPI4/PR0_ECAP0_IN_APWM_OUT/EQEP2_Ipassive
AD22GPIO1_1/RGMII2_RX_CTL/RMII2_RX_ER/MCASP2_AXR3/PR0_PRU0_GPO0/PR0_PRU0_GPI0passive
AD23GPIO1_2/RGMII2_RXC/RMII2_REF_CLK/MCASP2_AXR1/PR0_PRU0_GPO1/PR0_PRU0_GPI1/PR0_ECAP0_SYNC_INpassive
AD24GPIO0_86/MDIO0_MDCpassive
AD25VSSpassive
AE10USB0_RCALIBpassive
AE11USB0_DMpassive
AE12VSSpassive
AE13CSI0_RXP2passive
AE14CSI0_RXP1passive
AE15CSI0_RXCLKPpassive
AE16VSSpassive
AE17GPIO0_79/RGMII1_RX_CTL/RMII1_RX_ERpassive
AE18GPIO0_77/RGMII1_TD2/PR0_UART0_RXDpassive
AE19GPIO0_74/RGMII1_TXC/RMII1_CRS_DVpassive
AE20GPIO0_75/RGMII1_TD0/RMII1_TXD0passive
AE21GPIO0_88/RGMII2_TXC/RMII2_CRS_DV/MCASP2_AXR5/PR0_PRU1_GPO1/PR0_PRU1_GPI1passive
AE22GPIO1_6/RGMII2_RD3/AUDIO_EXT_REFCLK0/PR0_PRU0_GPO16/PR0_PRU0_GPI16/PR0_UART0_TXD/~{EQEP2_B}passive
AE23GPIO1_3/RGMII2_RD0/RMII2_RXD0/MCASP2_AXR2/PR0_PRU0_GPO2/PR0_PRU0_GPI2/PR0_UART0_RTSnpassive
AE24VSSpassive
AE25VSSpassive

Provenance

Credit
Celestial Altium Library by Issus and contributors (https://github.com/issus/altium-library)
Licence
LicenseRef-Celestial-Altium
Link method
none
Cross-check
not confirmed