Footprints
11 footprints matching “SOT”
Land patterns on their own — 19,830 of them, most never referenced by a symbol in the catalog. Each passed the courtyard and pad checks; 7,626 come with the 3D model they name.
PQFN-8-EP_6x5mm_P1.27mm_Generic
Package_DFN_QFN
Universal Footprint for Thermally-enhanced SO-8 packages; compatible with Vishay PowerPAK SO−8, International Rectifier PQFN, Texas Instrument SON 5 × 6 mm (Q5A), Alpha and Omega DFN 5 × 6, ST Microelectronics PowerFLAT™ 5 × 6, Toshiba SOP Advance, Infineon Super SO8, NXP LFPAK (SOT669), Renesas WPAK(3F) / LFPAK, Fairchild Power 56, APEC PMPAK 5 × 6, MagnaChip PowerDFN56, ROHM HSOP8, UBIQ PRPAK56, NIKO−SEM PDFN 5 × 6, NEC 8-pin HVSON. Datasheets: https://www.onsemi.com/pub/Collateral/AND9137-D.PDF, https://assets.nexperia.com/documents/leaflet/75016838.pdf
- Pads
- 5
- SMD
- 7.3×5.8
- Boards
- 9
DHVQFN-16-1EP_2.5x3.5mm_P0.5mm_EP1x2mm
Package_DFN_QFN
DHVQFN, 16 Pin (JEDEC MO-241/VAB, https://assets.nexperia.com/documents/package-information/SOT763-1.pdf)
- Pads
- 17
- SMD
- 3.7×4.7
- Boards
- 4
HVQFN-36-1EP_6x6mm_P0.5mm_EP3.9x3.9mm
Package_DFN_QFN
HVQFN, 36 Pin (https://www.nxp.com.cn/docs/en/package-information/SOT1092-2.pdf)
- Pads
- 37
- SMD
- 7.3×7.3
- Boards
- —
HVQFN-36-1EP_6x6mm_P0.5mm_EP3.9x3.9mm_ThermalVias
Package_DFN_QFN
HVQFN, 36 Pin (https://www.nxp.com.cn/docs/en/package-information/SOT1092-2.pdf)
- Pads
- 37
- SMD
- 7.3×7.3
- Boards
- —
NXP_VQFN-16-1EP_4x4mm_P0.65mm_EP2.1x2.1mm
Package_DFN_QFN
NXP VQFN, 16 Pin (https://www.nxp.com/docs/en/package-information/SOT629-1.pdf)
- Pads
- 17
- SMD
- 5.3×5.3
- Boards
- —
VQFN-48-1EP_7x7mm_P0.5mm_EP4.2x4.2mm
Package_DFN_QFN
VQFN, 48 Pin (Based on JEDEC MO-220 variation VKKD-2 (using Figure 1), custom Exposed Pad from NXP, https://www.jedec.org/document_search?search_api_views_fulltext=MO-220, https://www.nxp.com/docs/en/package-information/SOT619-28.pdf)
- Pads
- 49
- SMD
- 8.3×8.3
- Boards
- —
VQFN-48-1EP_7x7mm_P0.5mm_EP4.2x4.2mm_ThermalVias
Package_DFN_QFN
VQFN, 48 Pin (Based on JEDEC MO-220 variation VKKD-2 (using Figure 1), custom Exposed Pad from NXP, https://www.jedec.org/document_search?search_api_views_fulltext=MO-220, https://www.nxp.com/docs/en/package-information/SOT619-28.pdf)
- Pads
- 49
- SMD
- 8.3×8.3
- Boards
- —
VQFN-56-1EP_8x8mm_P0.5mm_EP5.1x4.96mm
Package_DFN_QFN
VQFN, 56 Pin (https://www.nxp.com/docs/en/package-information/SOT684-21.pdf)
- Pads
- 57
- SMD
- 9.2×9.2
- Boards
- —
VQFN-56-1EP_8x8mm_P0.5mm_EP5.1x4.96mm_ThermalVias
Package_DFN_QFN
VQFN, 56 Pin (https://www.nxp.com/docs/en/package-information/SOT684-21.pdf)
- Pads
- 57
- SMD
- 9.2×9.2
- Boards
- —
VQFN-56-1EP_8x8mm_P0.5mm_EP5.5x5.06mm
Package_DFN_QFN
VQFN, 56 Pin (https://www.nxp.com/docs/en/package-information/SOT684-21_DD_SC.pdf)
- Pads
- 57
- SMD
- 9.2×9.2
- Boards
- —
VQFN-56-1EP_8x8mm_P0.5mm_EP5.5x5.06mm_ThermalVias
Package_DFN_QFN
VQFN, 56 Pin (https://www.nxp.com/docs/en/package-information/SOT684-21_DD_SC.pdf)
- Pads
- 57
- SMD
- 9.2×9.2
- Boards
- —