Footprints

15,503 footprints matching “I”

Land patterns on their own — 19,830 of them, most never referenced by a symbol in the catalog. Each passed the courtyard and pad checks; 7,626 come with the 3D model they name.

I need

Symbol Footprint 3D model

Footprints on their own, whether or not a symbol uses them.

15,503 footprints · page 598 of 646

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Infineon_PG-DSO-20-U03_7.5x12.8mm

FP3D

Package_SO

Infineon PG-DSO, 20 Pin (https://www.infineon.com/dgdl/Infineon-2ED1323S12P_2ED1324S12P-DataSheet-v01_01-EN.pdf?fileId=8ac78c8c869190210186e92f0f506d0c)

Pads: 20
SMD: 11.8×13.3
Boards: —

Infineon_PG-DSO-8-24_4x5mm

FP3D

Package_SO

Infineon PG-DSO, 8 Pin (https://www.infineon.com/dgdl/Infineon-BSP752R-DS-v01_02-EN.pdf?fileId=db3a304316f112290116f233cbd271e9#page=17)

Pads: 8
SMD: 7.4×5.5
Boards: —

Infineon_PG-DSO-8-27_3.9x4.9mm_EP2.65x3mm_ThermalVias

FP—

Package_SO

Infineon PG-DSO, 8 Pin (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-8-27)

Pads: 9
SMD: 7.4×5.4
Boards: —

Infineon_PG-DSO-8-59_7.5x6.3mm

FP—

Package_SO

Infineon PG-DSO, 8 Pin (https://www.infineon.com/dgdl/Infineon-1EDCxxI12AH-DS-v02_00-EN.pdf)

Pads: 8
SMD: 11.8×6.8
Boards: —

Infineon_SOIC-20W_7.6x12.8mm_P1.27mm

FP—

Package_SO

Infineon SOIC, 20 Pin (https://www.infineon.com/dgdl/Infineon-PG-DSO-20-77_SPO_PDF-Package-v15_00-EN.pdf?fileId=5546d4625c54d85b015c627e1a0c23b3, https://www.infineon.com/dgdl/Infineon-PG-DSO-20-77_FPD_PDF-Footprint-v15_00-EN.pdf?fileId=5546d4625c54d85b015c5f0f49614324)

Pads: 20
SMD: 11.9×13.3
Boards: —

JEITA_SOIC-16_3.9x9.9mm_P1.27mm

FP3D

Package_SO

JEITA SOIC, 16 Pin (JEITA/EIAJ ED-7311-19, variation 16-001-ABA, https://www.jeita.or.jp/japanese/standard/book/ED-7311-19/#target/page_no=30)

Pads: 16
SMD: 7.7×10.4
Boards: —

Linear_HTSSOP-31-38-1EP_4.4x9.7mm_P0.5mm_EP2.74x4.75mm

FP—

Package_SO

Linear HTSSOP, 31 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-tssop/tssop_38_05-08-1865.pdf)

Pads: 32
SMD: 7.1×10.2
Boards: —

Linear_HTSSOP-31-38-1EP_4.4x9.7mm_P0.5mm_EP2.74x4.75mm_ThermalVias

FP—

Package_SO

Linear HTSSOP, 31 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-tssop/tssop_38_05-08-1865.pdf)

Pads: 32
SMD: 7.1×10.2
Boards: —

MSOP-10-1EP_3x3mm_P0.5mm_EP1.73x1.98mm_ThermalVias

FP—

Package_SO

MSOP, 10 Pin (www.allegromicro.com/~/media/Files/Datasheets/A4952-3-Datasheet.ashx?la=en#page=10)

Pads: 11
SMD: 6.3×3.5
Boards: —

MSOP-10-1EP_3x3mm_P0.5mm_EP2.2x3.1mm_Mask1.83x1.89mm_ThermalVias

FP—

Package_SO

MSOP, 10 Pin (https://www.ti.com/lit/ds/symlink/xtr111.pdf#page=27)

Pads: 11
SMD: 6.3×3.6
Boards: —

MSOP-12-1EP_3x4.039mm_P0.65mm_EP1.651x2.845mm_ThermalVias

FP3D

Package_SO

MSOP, 12 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/ltc-legacy-msop/05081666_g_mse12.pdf)

Pads: 13
SMD: 6.3×4.5
Boards: —

NXP_HTSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP2.2x3.4mm_ThermalVias

FP—

Package_SO

HTSSOP, 28 Pin (https://www.nxp.com/docs/en/package-information/SOT1172-3.pdf)

Pads: 29
SMD: 8.0×10.3
Boards: —

OnSemi_751EP_SOIC-4_3.9x4.725mm_P2.54mm

FP—

Package_SO

OnSemi 751EP SOIC, 4 Pin (https://www.onsemi.com/pdf/datasheet/mb8s-d.pdf)

Pads: 4
SMD: 9.1×5.2
Boards: —

PowerIntegrations_eSOP-12B

FP3D

Package_SO

eSOP-12B SMT Flat Package with Heatsink Tab, see https://ac-dc.power.com/sites/default/files/product-docs/topswitch-jx_family_datasheet.pdf

Pads: 12
SMD: 13.6×11.2
Boards: —

PowerIntegrations_SO-8B

FP3D

Package_SO

Power-Integrations variant of 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC], see https://www.mouser.com/ds/2/328/linkswitch-pl_family_datasheet-12517.pdf

Pads: 7
SMD: 7.4×5.4
Boards: —

SO-20-1EP_7.52x12.825mm_P1.27mm_EP6.045x12.09mm_Mask3.56x4.47mm_ThermalVias

FP—

Package_SO

SO, 20 Pin (http://www.ti.com/lit/ds/symlink/opa569.pdf, http://www.ti.com/lit/an/slma004b/slma004b.pdf)

Pads: 21
SMD: 11.9×13.3
Boards: —

SOIC-14-16_3.9x9.9mm_P1.27mm

FP3D

Package_SO

SOIC, 16 Pin package with pin 2 and 13 removed for voltage clearance (UCC256301, https://www.ti.com/lit/ds/symlink/ucc256301.pdf)

Pads: 14
SMD: 7.4×10.4
Boards: —

SOIC-5-6_4.4x3.6mm_P1.27mm

FP3D

Package_SO

SOIC, 5 Pin (JEDEC MO-155, variation AA, 2.50mm nominal body thickness, https://www.jedec.org/system/files/docs/Mo-155a.pdf)

Pads: 5
SMD: 8.4×4.1
Boards: —

SOIC-8_3.81x9.347mm_P2.54mm

FP3D

Package_SO

SOIC, 8 Pin (https://www.littelfuse.com/assetdocs/littelfuse-integrated-circuits-cpc2014n-datasheet?assetguid=6e3baf84-de75-4ea7-97ce-3a5e05a007c9)

Pads: 8
SMD: 7.5×9.9
Boards: —

SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.71x3.7mm

FP—

Package_SO

SOIC, 8 Pin (https://www.aosmd.com/res/datasheets/AOZ1284PI.pdf)

Pads: 9
SMD: 7.4×5.4
Boards: —

SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.71x3.7mm_ThermalVias

FP—

Package_SO

SOIC, 8 Pin (https://www.aosmd.com/res/datasheets/AOZ1284PI.pdf)

Pads: 9
SMD: 7.4×5.4
Boards: —

SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.34x2.34mm

FP—

Package_SO

SOIC, 8 Pin (JEDEC MS-012 variation BA (thermally enhanced), using tolerances and Exposed Pad from Texas Instruments DDA0008A, https://www.ti.com/lit/ml/pptd272a/pptd272a.pdf, https://www.ti.com/lit/ds/symlink/tps92511.pdf#page=29, https://www.jedec.org/document_search?search_api_views_fulltext=MS-012)

Pads: 9
SMD: 7.4×5.4
Boards: —

SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.34x2.34mm_ThermalVias

FP—

Package_SO

Pads: 9
SMD: 7.4×5.4
Boards: —

SSO-8_13.6x6.3mm_P1.27mm_Clearance14.2mm

FP3D

Package_SO

8-Lead Plastic Stretched Small Outline (SSO/Stretched SO), see https://docs.broadcom.com/cs/Satellite?blobcol=urldata&blobheader=application%2Fpdf&blobheadername1=Content-Disposition&blobheadername2=Content-Type&blobheadername3=MDT-Type&blobheadervalue1=attachment%3Bfilename%3DIPD-Selection-Guide_AV00-0254EN_030617.pdf&blobheadervalue2=application%2Fx-download&blobheadervalue3=abinary%253B%2Bcharset%253DUTF-8&blobkey=id&blobnocache=true&blobtable=MungoBlobs&blobwhere=1430884105675&ssbinary=true

Pads: 8
SMD: 18.4×6.7
Boards: —