Reference layout
Dev Portpulse Hardware RevC1 Kicad USB Replug Dongle RevC1
gslee-dev-portpulse-hardware-RevC1-kicad-USB_Replug_Dongle_RevC1-layout
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gslee-dev-portpulse-hardware-RevC1-kicad-USB_Replug_Dongle_RevC1-layout
The project archive carries the board, its project file and the upstream licence. The archive is zstd-compressed (tar.zst).
Bill of materials
38 distinct parts
27 resolve to something in the catalog — click through to the footprint.
| Ref | Value | Footprint | Qty |
|---|---|---|---|
| C1 | 10uF 10V X5R | Capacitor_SMD:C_0603_1608Metric | |
| C10 | 10uF 10V X5R | Capacitor_SMD:C_0603_1608Metric | |
| C2 | 1uF 16V X5R | Capacitor_SMD:C_0603_1608Metric | |
| C3 | 1uF 16V X5R | Capacitor_SMD:C_0603_1608Metric | |
| C4 | 100nF 16V X7R | Capacitor_SMD:C_0603_1608Metric | |
| C5 | 100nF 16V X7R | Capacitor_SMD:C_0603_1608Metric | |
| C6 | 100nF 16V X7R | Capacitor_SMD:C_0603_1608Metric | |
| C7 | 100nF 16V X7R | Capacitor_SMD:C_0603_1608Metric | |
| C8 | 100nF 16V X7R | Capacitor_SMD:C_0603_1608Metric | |
| C9 | 100nF 16V X7R | Capacitor_SMD:C_0603_1608Metric | |
| J1 | TYPE-C-3.1-16PIN | USB_Replug_Dongle_RevC1:C7507405_USB_C | |
| J2 | 904-131A2032S10100 | USB_Replug_Dongle_RevC1:C8328_USB_A | |
| J3 | CH552 PROG | USB_Replug_Dongle_RevC1:PROG_PADS_2x3_P1.27 | |
| R1 | 5.1k 1% | Resistor_SMD:R_0603_1608Metric | |
| R10 | 51k 1% | Resistor_SMD:R_0603_1608Metric | |
| R2 | 5.1k 1% | Resistor_SMD:R_0603_1608Metric | |
| R4 | 5.1k 1% | Resistor_SMD:R_0603_1608Metric | |
| R5 | 5.1k 1% | Resistor_SMD:R_0603_1608Metric | |
| R6 | 5.1k 1% | Resistor_SMD:R_0603_1608Metric | |
| R7 | 5.1k 1% | Resistor_SMD:R_0603_1608Metric | |
| R8 | 5.1k 1% | Resistor_SMD:R_0603_1608Metric | |
| R9 | 5.1k 1% | Resistor_SMD:R_0603_1608Metric | |
| TP1 | VBUS_IN | USB_Replug_Dongle_RevC1:TP_Pad_0.7mm | |
| TP2 | 3V3 | USB_Replug_Dongle_RevC1:TP_Pad_0.7mm | |
| TP3 | VBUS_DUT | USB_Replug_Dongle_RevC1:TP_Pad_0.7mm | |
| TP4 | GND | USB_Replug_Dongle_RevC1:TP_Pad_0.7mm | |
| TP5 | TARGET_PWR_EN_N | USB_Replug_Dongle_RevC1:TP_Pad_0.7mm | |
| TP6 | TARGET_DATA_OE_N | USB_Replug_Dongle_RevC1:TP_Pad_0.7mm | |
| TP7 | TARGET_FAULT_N | USB_Replug_Dongle_RevC1:TP_Pad_0.7mm | |
| TP8 | HUB_RESET_N | USB_Replug_Dongle_RevC1:TP_Pad_0.7mm | |
| U1 | CH334U | Package_SO:QSOP-28_3.9x9.9mm_P0.635mm | |
| U2 | CH552T | Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm | |
| U3 | FSUSB42MUX | Package_SO:MSOP-10_3x3mm_P0.5mm | |
| U4 | TPS2552DBVR | Package_TO_SOT_SMD:SOT-23-6 | |
| U5 | XC6206P332MR-G | Package_TO_SOT_SMD:SOT-23 | |
| U6 | USBLC6-2SC6 | Package_TO_SOT_SMD:SOT-23-6 | |
| U7 | USBLC6-2SC6 | Package_TO_SOT_SMD:SOT-23-6 | |
| Y1 | 12 MHz | Crystal:Crystal_SMD_3225-4Pin_3.2x2.5mm |
Provenance
- Repository
- gslee-dev/portpulse ↗
- Commit
- e8198b0ff8c2f18b81fd10bde1337fff3c76cd3f
- Licence
- MIT
How it is used
Trace's agent reads this design as context — what parts a board like this carries, how they are grouped across sheets, what a plausible layer stack and board size look like for the job. It is not copied. The licence above is permissive, and it, the repository and the commit are recorded so the origin of anything derived from it is always answerable.