Footprints

37 footprints matching “pads”

Land patterns on their own — 19,830 of them, most never referenced by a symbol in the catalog. Each passed the courtyard and pad checks; 7,626 come with the 3D model they name.

37 footprints · page 1 of 2

Matched by name and keywords. Search by meaning instead

TI_SO-PowerPAD-8_ThermalVias

FP—

Package_SO

8-pin HTSOP package with 1.27mm pin pitch, compatible with SOIC-8, 3.9x4.9mm² body, exposed pad, thermal vias with large copper area, as proposed in http://www.ti.com/lit/ds/symlink/tps5430.pdf

Pads
9
SMD
7.5×5.5
Boards
103

Texas_HTSOP-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.4x3.1mm_ThermalVias

FP3D

Package_SO

8-pin HTSOP package with 1.27mm pin pitch, compatible with SOIC-8, 3.9x4.9mm body, exposed pad, thermal vias, http://www.ti.com/lit/ds/symlink/drv8870.pdf

Pads
9
SMD
8.4×5.5
Boards
47

Texas_HSOP-8-1EP_3.9x4.9mm_P1.27mm_ThermalVias

FP—

Package_SO

Texas Instruments HSOP 9, 1.27mm pitch, 3.9x4.9mm body, exposed pad, thermal vias, DDA0008J (http://www.ti.com/lit/ds/symlink/tps5430.pdf)

Pads
9
SMD
7.5×5.5
Boards
34

TI_SO-PowerPAD-8

FP3D

Package_SO

8-Lead Plastic PSOP, Exposed Die Pad (TI DDA0008B, see http://www.ti.com/lit/ds/symlink/lm3404.pdf)

Pads
9
SMD
8.0×5.4
Boards
33

TSSOP-16-1EP_4.4x5mm_P0.65mm

FP3D

Package_SO

FE Package; 16-Lead Plastic TSSOP (4.4mm); Exposed Pad Variation BB; (see Linear Technology 1956f.pdf)

Pads
17
SMD
7.0×5.7
Boards
25

Diodes_SO-8EP

FP—

Package_SO

8-Lead Plastic SO, Exposed Die Pad (see https://www.diodes.com/assets/Package-Files/SO-8EP.pdf)

Pads
9
SMD
7.0×5.1
Boards
22

SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.71x3.4mm_ThermalVias

FP—

Package_SO

SOIC, 8 Pin (JEDEC MS-012 variation BA (thermally enhanced), using tolerances and Exposed Pad from Texas Instruments DDA0008B, https://www.ti.com/lit/ml/pptd058j/pptd058j.pdf, https://www.ti.com/lit/ds/symlink/lm5017.pdf#page=35, https://www.jedec.org/document_search?search_api_views_fulltext=MS-012)

Pads
9
SMD
7.4×5.4
Boards
16

Infineon_PG-DSO-12-11

FP—

Package_SO

Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-11/)

Pads
13
SMD
12.1×8.6
Boards
12

HTSSOP-16-1EP_4.4x5mm_P0.65mm_EP3.4x5mm

FP—

Package_SO

16-Lead Plastic HTSSOP (4.4x5x1.2mm); Thermal pad; (http://www.ti.com/lit/ds/symlink/drv8833.pdf)

Pads
17
SMD
7.0×5.7
Boards
10

Diodes_PSOP-8

FP—

Package_SO

8-Lead Plastic PSOP, Exposed Die Pad (see https://www.diodes.com/assets/Datasheets/AP2204.pdf)

Pads
9
SMD
7.4×5.4
Boards
9

HTSSOP-16-1EP_4.4x5mm_P0.65mm_EP3.4x5mm_Mask3x3mm_ThermalVias

FP—

Package_SO

16-Lead Plastic HTSSOP (4.4x5x1.2mm); Thermal pad with vias; (http://www.ti.com/lit/ds/symlink/drv8800.pdf)

Pads
17
SMD
7.0×5.7
Boards
9

HTSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP3.4x9.5mm_ThermalVias

FP3D

Package_SO

HTSSOP28: plastic thin shrink small outline package; 28 leads; body width 4.4 mm; thermal pad

Pads
29
SMD
7.3×10.3
Boards
8

ETSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3x4.2mm

FP3D

Package_SO

20-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body with Exposed Pad [eTSSOP] (see Microchip Packaging Specification 00000049BS.pdf)

Pads
21
SMD
7.9×7.1
Boards
7

TSOP-I-28_11.8x8mm_P0.55mm

FP3D

Package_SO

TSOP I, 28 pins, 18.8x8mm body, 0.55mm pitch, IPC-calculated pads (http://ww1.microchip.com/downloads/en/devicedoc/doc0807.pdf)

Pads
28
SMD
14.9×8.7
Boards
6

Texas_HSOP-8-1EP_3.9x4.9mm_P1.27mm

FP—

Package_SO

Texas Instruments HSOP 9, 1.27mm pitch, 3.9x4.9mm body, exposed pad, DDA0008J (http://www.ti.com/lit/ds/symlink/tps5430.pdf)

Pads
9
SMD
7.5×5.5
Boards
5

HTSSOP-24-1EP_4.4x7.8mm_P0.65mm_EP3.2x5mm

FP—

Package_SO

HTSSOP, 24 Pin (JEDEC MO-153 variation ADT, 1.00mm body thickness, custom Exposed Pad size from STMicroelectronics, https://www.jedec.org/document_search?search_api_views_fulltext=MO-153, https://www.st.com/resource/en/datasheet/stp16cp05.pdf#page=25, https://www.st.com/resource/en/datasheet/led1642gw.pdf#page=37)

Pads
25
SMD
7.8×8.3
Boards
4

SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.71x3.4mm

FP—

Package_SO

SOIC, 8 Pin (JEDEC MS-012 variation BA (thermally enhanced), using tolerances and Exposed Pad from Texas Instruments DDA0008B, https://www.ti.com/lit/ml/pptd058j/pptd058j.pdf, https://www.ti.com/lit/ds/symlink/lm5017.pdf#page=35, https://www.jedec.org/document_search?search_api_views_fulltext=MS-012)

Pads
9
SMD
7.4×5.4
Boards
4

TSSOP-14-1EP_4.4x5mm_P0.65mm

FP3D

Package_SO

14-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [TSSOP] with exposed pad (http://cds.linear.com/docs/en/datasheet/34301fa.pdf)

Pads
15
SMD
7.9×5.6
Boards
4

HTSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP3.4x9.5mm_Mask2.4x6.17mm_ThermalVias

FP3D

Package_SO

HTSSOP28: plastic thin shrink small outline package; 28 leads; body width 4.4 mm; thermal pad

Pads
29
SMD
7.3×10.3
Boards
3

Infineon_PG-DSO-12-9

FP—

Package_SO

Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-9/)

Pads
13
SMD
12.1×8.6
Boards
3

HTSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP3.4x9.5mm

FP3D

Package_SO

HTSSOP28: plastic thin shrink small outline package; 28 leads; body width 4.4 mm; thermal pad

Pads
29
SMD
7.3×10.3
Boards
2

Texas_PWP0020A

FP3D

Package_SO

20-Pin Thermally Enhanced Thin Shrink Small-Outline Package, Body 4.4x6.5x1.1mm, Pad 3.0x4.2mm, Texas Instruments (see http://www.ti.com/lit/ds/symlink/lm5118.pdf)

Pads
21
SMD
8.2×7.0
Boards
2

HTSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP3.4x6.5mm_ThermalVias

FP3D

Package_SO

20-Lead Plastic Thin Shrink Small Outline (ST)-4.4 mm Body [HTSSOP], with thermal pad with vias

Pads
21
SMD
7.9×7.1
Boards
1

Infineon_PG-DSO-12-9_ThermalVias

FP—

Package_SO

Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, with thermal vias (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-9/)

Pads
13
SMD
12.1×8.6
Boards
1