Footprints

23 footprints matching “PowerPAD

Land patterns on their own — 19,830 of them, most never referenced by a symbol in the catalog. Each passed the courtyard and pad checks; 7,626 come with the 3D model they name.

23 footprints

Matched by name and keywords. Search by meaning instead

TI_SO-PowerPAD-8_ThermalVias

FP

Package_SO

8-pin HTSOP package with 1.27mm pin pitch, compatible with SOIC-8, 3.9x4.9mm² body, exposed pad, thermal vias with large copper area, as proposed in http://www.ti.com/lit/ds/symlink/tps5430.pdf

Pads
9
SMD
7.5×5.5
Boards
103

TI_SO-PowerPAD-8

FP3D

Package_SO

8-Lead Plastic PSOP, Exposed Die Pad (TI DDA0008B, see http://www.ti.com/lit/ds/symlink/lm3404.pdf)

Pads
9
SMD
8.0×5.4
Boards
33

HTSSOP-16-1EP_4.4x5mm_P0.65mm_EP3.4x5mm_Mask2.46x2.31mm_ThermalVias

FP

Package_SO

HTSSOP, 16 Pin (Texas Instruments PWP0016C, based on JEDEC MO-153 variation ABT, 1.00mm body thickness, https://www.ti.com/lit/ml/pptd023ac/pptd023ac.pdf, https://www.ti.com/lit/ds/symlink/drv8833.pdf#page=27, https://www.jedec.org/document_search?search_api_views_fulltext=MO-153)

Pads
17
SMD
7.8×5.5
Boards
31

SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.71x3.4mm_ThermalVias

FP

Package_SO

SOIC, 8 Pin (JEDEC MS-012 variation BA (thermally enhanced), using tolerances and Exposed Pad from Texas Instruments DDA0008B, https://www.ti.com/lit/ml/pptd058j/pptd058j.pdf, https://www.ti.com/lit/ds/symlink/lm5017.pdf#page=35, https://www.jedec.org/document_search?search_api_views_fulltext=MS-012)

Pads
9
SMD
7.4×5.4
Boards
16

HTSSOP-16-1EP_4.4x5mm_P0.65mm_EP3.4x5mm_Mask2.46x2.31mm

FP

Package_SO

HTSSOP, 16 Pin (Texas Instruments PWP0016C, based on JEDEC MO-153 variation ABT, 1.00mm body thickness, https://www.ti.com/lit/ml/pptd023ac/pptd023ac.pdf, https://www.ti.com/lit/ds/symlink/drv8833.pdf#page=27, https://www.jedec.org/document_search?search_api_views_fulltext=MO-153)

Pads
17
SMD
7.8×5.5
Boards
9

HTSSOP-32-1EP_6.1x11mm_P0.65mm_EP5.2x11mm_Mask4.11x4.36mm_ThermalVias

FP3D

Package_SO

HTSSOP32: plastic thin shrink small outline package; 32 leads; body width 6.1 mm; lead pitch 0.65 mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot487-1_po.pdf)

Pads
33
SMD
9.0×11.6
Boards
9

SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.71x3.4mm

FP

Package_SO

SOIC, 8 Pin (JEDEC MS-012 variation BA (thermally enhanced), using tolerances and Exposed Pad from Texas Instruments DDA0008B, https://www.ti.com/lit/ml/pptd058j/pptd058j.pdf, https://www.ti.com/lit/ds/symlink/lm5017.pdf#page=35, https://www.jedec.org/document_search?search_api_views_fulltext=MS-012)

Pads
9
SMD
7.4×5.4
Boards
4

HTSSOP-32-1EP_6.1x11mm_P0.65mm_EP5.2x11mm_Mask4.11x4.36mm

FP3D

Package_SO

HTSSOP32: plastic thin shrink small outline package; 32 leads; body width 6.1 mm; lead pitch 0.65 mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot487-1_po.pdf)

Pads
33
SMD
9.0×11.6
Boards
2

SOIC-8-PowerPAD

FP

agg-agg

Pads
9
SMD
7.5×5.5
Boards

Texas_TQFP-64-1EP_10x10mm_P0.5mm_EP8x8mm_Mask4.44x4.44mm

FP

Package_QFP

Texas TQFP, 64 Pin (Texas PAP0064M, based on JEDEC MS-026 variation ACD, 1.00mm body thickness, https://www.ti.com/lit/ml/pptd078j/pptd078j.pdf, https://www.ti.com/lit/ds/symlink/tusb4041i.pdf#page=40)

Pads
65
SMD
13.4×13.4
Boards

Texas_TQFP-64-1EP_10x10mm_P0.5mm_EP8x8mm_Mask4.44x4.44mm_ThermalVias

FP

Package_QFP

Texas TQFP, 64 Pin (Texas PAP0064M, based on JEDEC MS-026 variation ACD, 1.00mm body thickness, https://www.ti.com/lit/ml/pptd078j/pptd078j.pdf, https://www.ti.com/lit/ds/symlink/tusb4041i.pdf#page=40)

Pads
65
SMD
13.4×13.4
Boards

Texas_TQFP-64-1EP_10x10mm_P0.5mm_EP8x8mm_Mask5x5mm

FP

Package_QFP

Texas TQFP, 64 Pin (Texas PAP (S-PQFP-G64), based on JEDEC MS-026 variation ACD, 1.00mm body thickness, https://www.ti.com/lit/ds/symlink/tfp410.pdf#page=41)

Pads
65
SMD
13.4×13.4
Boards

Texas_TQFP-64-1EP_10x10mm_P0.5mm_EP8x8mm_Mask5x5mm_ThermalVias

FP

Package_QFP

Texas TQFP, 64 Pin (Texas PAP (S-PQFP-G64), based on JEDEC MS-026 variation ACD, 1.00mm body thickness, https://www.ti.com/lit/ds/symlink/tfp410.pdf#page=41)

Pads
65
SMD
13.4×13.4
Boards

HTSSOP-24-1EP_4.4x7.8mm_P0.65mm_EP3.4x7.8mm_Mask2.44x3.42mm

FP

Package_SO

HTSSOP, 24 Pin (Texas Instruments PWP0024U, based on JEDEC MO-153 variation ADT, 1.00mm body thickness, https://www.ti.com/lit/ml/pptd402/pptd402.pdf, https://www.ti.com/lit/ds/symlink/tlc5949.pdf#page=50, https://www.jedec.org/document_search?search_api_views_fulltext=MO-153)

Pads
25
SMD
7.8×8.3
Boards

HTSSOP-24-1EP_4.4x7.8mm_P0.65mm_EP3.4x7.8mm_Mask2.44x3.42mm_ThermalVias

FP

Package_SO

HTSSOP, 24 Pin (Texas Instruments PWP0024U, based on JEDEC MO-153 variation ADT, 1.00mm body thickness, https://www.ti.com/lit/ml/pptd402/pptd402.pdf, https://www.ti.com/lit/ds/symlink/tlc5949.pdf#page=50, https://www.jedec.org/document_search?search_api_views_fulltext=MO-153)

Pads
25
SMD
7.8×8.3
Boards

HTSSOP-24-1EP_4.4x7.8mm_P0.65mm_EP3.4x7.8mm_Mask2.4x2.98mm

FP

Package_SO

HTSSOP, 24 Pin (Texas Instruments PWP0024P, based on JEDEC MO-153 variation ADT, 1.00mm body thickness, https://www.ti.com/lit/ml/pptd064i/pptd064i.pdf, https://web.archive.org/web/20170223145154/http://www.ti.com/lit/ds/symlink/tlc5949.pdf#page=49, https://www.jedec.org/document_search?search_api_views_fulltext=MO-153)

Pads
25
SMD
7.8×8.3
Boards

HTSSOP-24-1EP_4.4x7.8mm_P0.65mm_EP3.4x7.8mm_Mask2.4x2.98mm_ThermalVias

FP

Package_SO

HTSSOP, 24 Pin (Texas Instruments PWP0024P, based on JEDEC MO-153 variation ADT, 1.00mm body thickness, https://www.ti.com/lit/ml/pptd064i/pptd064i.pdf, https://web.archive.org/web/20170223145154/http://www.ti.com/lit/ds/symlink/tlc5949.pdf#page=49, https://www.jedec.org/document_search?search_api_views_fulltext=MO-153)

Pads
25
SMD
7.8×8.3
Boards

SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.34x2.34mm

FP

Package_SO

SOIC, 8 Pin (JEDEC MS-012 variation BA (thermally enhanced), using tolerances and Exposed Pad from Texas Instruments DDA0008A, https://www.ti.com/lit/ml/pptd272a/pptd272a.pdf, https://www.ti.com/lit/ds/symlink/tps92511.pdf#page=29, https://www.jedec.org/document_search?search_api_views_fulltext=MS-012)

Pads
9
SMD
7.4×5.4
Boards

SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.34x2.34mm_ThermalVias

FP

Package_SO

SOIC, 8 Pin (JEDEC MS-012 variation BA (thermally enhanced), using tolerances and Exposed Pad from Texas Instruments DDA0008A, https://www.ti.com/lit/ml/pptd272a/pptd272a.pdf, https://www.ti.com/lit/ds/symlink/tps92511.pdf#page=29, https://www.jedec.org/document_search?search_api_views_fulltext=MS-012)

Pads
9
SMD
7.4×5.4
Boards

Texas_DAD0032A_HTSSOP-32_6.1x11mm_P0.65mm_TopEP3.71x3.81mm

FP

Package_SO

Texas DAD0032A HTSSOP, 32 Pin (https://www.ti.com/lit/ds/symlink/tpa3116d2.pdf)

Pads
32
SMD
9.5×11.5
Boards

Texas_DKD0036A_HSSOP-36_11x15.9mm_P0.65mm_TopEP5.85x12.65mm

FP

Package_SO

Texas DKD0036A HSSOP, 36 Pin (https://www.ti.com/lit/ml/pptd185d/pptd185d.pdf)

Pads
36
SMD
15.7×16.4
Boards

Texas_HTSSOP-14-1EP_4.4x5mm_P0.65mm_EP3.4x5mm_Mask3.155x3.255mm

FP3D

Package_SO

Texas HTSSOP, 14 Pin (Texas Instruments PWP0014A, based on JEDEC MO-153 variation ABT-1, 1.00mm body thickness, https://www.ti.com/lit/ml/pptd287a/pptd287a.pdf, https://www.ti.com/lit/ds/symlink/lm5161.pdf#page=34, https://www.jedec.org/document_search?search_api_views_fulltext=MO-153)

Pads
15
SMD
7.8×5.5
Boards

Texas_HTSSOP-14-1EP_4.4x5mm_P0.65mm_EP3.4x5mm_Mask3.155x3.255mm_ThermalVias

FP3D

Package_SO

Texas HTSSOP, 14 Pin (Texas Instruments PWP0014A, based on JEDEC MO-153 variation ABT-1, 1.00mm body thickness, https://www.ti.com/lit/ml/pptd287a/pptd287a.pdf, https://www.ti.com/lit/ds/symlink/lm5161.pdf#page=34, https://www.jedec.org/document_search?search_api_views_fulltext=MO-153)

Pads
15
SMD
7.8×5.5
Boards